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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM8AF6213 датащи(PDF) 57 Page - STMicroelectronics |
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STM8AF6213 датащи(HTML) 57 Page - STMicroelectronics |
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57 / 106 page  DocID025118 Rev 5 57/106 STM8AF6213/23/23A/26 Electrical characteristics 103 Figure 9. fCPUmax versus VDD Table 27. Operating conditions at power-up/power-down Symbol Parameter Conditions Min Typ Max Unit tVDD VDD rise time rate - 2(1) 1. Guaranteed by design, not tested in production - µs/V VDD fall time rate(2) 2. Reset is always generated after a tTEMP delay. The application must ensure that VDD is still above the minimum operating voltage (VDD min) when the tTEMP delay has elapsed. - 2(1) - tTEMP Reset release delay VDD rising - - 1.7 ms VIT+ Power-on reset threshold(3) 3. There is inrush current into VDD present after device power on to charge CEXT capacitor. This inrush energy depends from CEXT capacitor value. For example, a CEXT of 1μF requires Q=1 μF x 1.8V = 1.8 μC. - 2.6(1) 2.7 2.85 V VIT- Brown-out reset threshold - 2.5 2.65 2.8(1) VHYS(BOR) Brown-out reset hysteresis -- 70(1) -mV |
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