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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CCU3000 датащи(PDF) 13 Page - Micronas |
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CCU3000 датащи(HTML) 13 Page - Micronas |
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13 / 77 page  CCU 3000, CCU 3000-I CCU 3001, CCU 3001-I MICRONAS INTERMETALL 13 write: bit 0 1... Write 8 bit bit 1 1... Write 16 bit bit 2 1... Read 8 bit bit 3 1... Read 16 bit 1 byte Data rate (5 bits) = fosc 4 . n Only one of the bits 0 to 3 in the control register should be set. If all bits are set to ‘0‘, a reset of the interface is done, thus deleting telegrams still waiting for access to the bus. The IM bus addresses for the slave registers are: Slave register IM bus address 1 02 H 2 03 H 3 04 H Fig. 2–13: IM bus interface INT INT Data rate n Master Interface transmission completed slave register 1 (IM Bus Mode Slave Slave Slave Slave 1 2 3 Contr. Data Addr. Rate ID Data CLK 3 4 Master Ready IM Bus addresses 2, 3 and 4 Interface Data rate: 4 n . fosc 4 fosc . f IM fIM ;n = = CPU data bus address 02H) received data (1 byte) |
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