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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32F318C8 датащи(PDF) 102 Page - STMicroelectronics |
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STM32F318C8 датащи(HTML) 102 Page - STMicroelectronics |
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102 / 125 page  Electrical characteristics STM32F318C8 STM32F318K8 102/125 DocID026294 Rev 5 Figure 30. 12-bit buffered /non-buffered DAC 1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the DAC_CR register. 6.3.20 Comparator characteristics tWAKEUP(3) Wakeup time from off state (Setting the ENx bit in the DAC Control register) CLOAD 50 pF, RLOAD 5 k -6.5 10 µs PSRR+ (1) Power supply rejection ratio (to VDDA) (static DC measurement CLOAD 50 pF, No RLOAD 5 k - –67 –40 dB 1. Guaranteed by design, not tested in production. 2. Quiescent mode refers to the state of the DAC a keeping steady value on the output, so no dynamic consumption is involved. 3. Data based on characterization results, not tested in production. Table 64. DAC characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit Table 65. Comparator characteristics(1) Symbol Parameter Conditions Min. Typ. Max. Unit VDDA Analog supply voltage VREFINT scaler not in use 1.8 - 3.6 V VREFINT scaler in use 2 - 3.6 VIN Comparator input voltage range -0 - VDDA V VBG Scaler input voltage - - VREFINIT - VSC Scaler offset voltage - - ±5 ±10 mV tS_SC VREFINT scaler startup time from power down VREFINT scaler activation after device power on -- 1(2) s Next activations - - 0.2 ms tSTART Comparator startup time VDDA 2.7 V - - 4 µs VDDA 2.7 V - - 10 |
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