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STM32F058C8 датащи(PDF) 69 Page - STMicroelectronics

номер детали STM32F058C8
подробное описание детали  Advanced ARM-based 32-bit MCU, 64 KB Flash, 11 timers, ADC, DAC & comm. interfaces, 1.8 V
PDF  104 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
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STM32F058C8 датащи(HTML) 69 Page - STMicroelectronics

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STM32F058C8 STM32F058R8 STM32F058T8
Electrical characteristics
84
6.3.14
NRST and NPOR pin characteristics
NRST pin characteristics
The NRST pin input driver uses the CMOS technology. It is connected to a permanent pull-
up resistor, RPU.
Unless otherwise specified, the parameters given in the table below are derived from tests
performed under the ambient temperature and supply voltage conditions summarized in
Table 19: General operating conditions.
Figure 21. Recommended NRST pin protection
1. The external capacitor protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in
Table 48: NRST pin characteristics. Otherwise the reset will not be taken into account by the device.
NPOR pin characteristics
The NPOR pin input driver uses the CMOS technology. It is connected to a permanent pull-
up resistor to the VDDA, RPU.
Unless otherwise specified, the parameters given in Table 49 below are derived from tests
performed under ambient temperature and supply voltage conditions summarized in
Table 19: General operating conditions.
Table 48. NRST pin characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL(NRST) NRST input low level voltage
-
-
-
0.3 VDD+0.07(1)
V
VIH(NRST) NRST input high level voltage
-
0.445 VDD+0.398(1)
--
Vhys(NRST)
NRST Schmitt trigger voltage
hysteresis
--
200
-
mV
RPU
Weak pull-up equivalent
resistor(2)
VIN = VSS
25
40
55
k
Ω
VF(NRST) NRST input filtered pulse
-
-
-
100(1)
ns
VNF(NRST) NRST input not filtered pulse
-
700(1)
--
ns
1. Data based on design simulation only. Not tested in production.
2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series
resistance is minimal (~10% order).



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