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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ADSP2186 датащи(PDF) 19 Page - Analog Devices |
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ADSP2186 датащи(HTML) 19 Page - Analog Devices |
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19 / 32 page  ADSP-2186 REV. 0 –19– Parameter Min Max Unit Bus Request/Grant Timing Requirements: tBH BR Hold after CLKOUT High 1 0.25 tCK + 2 ns tBS BR Setup before CLKOUT Low 1 0.25 tCK + 17 ns Switching Characteristics: tSD CLKOUT High to xMS, RD, WR Disable 0.25 tCK + 10 ns tSDB xMS, RD, WR Disable to BG Low 0 ns tSE BG High to xMS, RD, WR Enable 0 ns tSEC xMS, RD, WR Enable to CLKOUT High 0.25 tCK – 7 ns tSDBH xMS, RD, WR Disable to BGH Low 2 0ns tSEH BGH High to xMS, RD, WR Enable 2 0ns NOTES xMS = PMS, DMS, CMS, IOMS, BMS. 1BR is an asynchronous signal. If BR meets the setup/hold requirements, it will be recognized during the current clock cycle; otherwise the signal will be recognized on the following cycle. Refer to the ADSP-2100 Family User’s Manual for BR/BG cycle relationships. 2BGH is asserted when the bus is granted and the processor requires control of the bus to continue. CLKOUT tSD tSDB tSE tSEC tSDBH tSEH tBS BR tBH CLKOUT PMS, DMS BMS, RD WR BG BGH Figure 16. Bus Request–Bus Grant |
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