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MCP19035 датащи(PDF) 30 Page - Microchip Technology |
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MCP19035 датащи(HTML) 30 Page - Microchip Technology |
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30 / 44 page ![]() MCP19035 DS22326B-page 30 2012-2013 Microchip Technology Inc. • For double layer boards, a single ground plane (usually the bottom) is recommended. • Use short, wide traces for the MOSFET’s gate drive connection (LDRV and HDRV signals). • Place the main MOSFET (control/high-side MOS- FET) as close as possible to the input capacitors. • Minimize the connections between MOSFETs, the inductor and the MCP19035 case (PHASE node). Place this node over a ground plane to minimize the radiated noise. • Place the compensation network components near the MCP19035 case and connect these components to a low noise ground (signal ground). • Locate the VIN decoupling capacitor close to the MCP19035 case. • Locate the Bootstrap Circuit capacitor close to the MCP19035 case. • Minimize the area of high frequency current loops. Figure 6-1 helps the PCB designer to identify the main high frequency current paths for the Synchronous Buck Converter. FIGURE 6-1: High Frequency Current Paths. All these currents contain high-frequency components and can produce EMI. Minimizing the area of these loops will reduce the radiated noise. The Reverse Recovery of the SR MOSFET Body Diode current is an important source of noise and EMI. This current, although very short (less than 10 ns), can easily reach a few hundred amps, especially when using low ESR capacitors for input bypass and very fast MOSFETs for switching transistors. If this current passes through a path that has a high inductance, it will produce an intense voltage ringing. For noise sensitive applications (for example, RF applications) the excessive voltage ringing in the PHASE node produced by Reverse Recovery of SR MOSFET Body Diode can be reduced by placing a low- value resistor in series with the bootstrap capacitor. This resistor will slow down the high-side MOSFET during low-to-high transition, reducing the slew rate of the SW node signal. The recommended value for this resistor is between 2.2Ω and 10Ω, and should be determined by lab measurements. The penalty of including this resistor is an efficiency reduction. It should, however, be no more than 0.5%. CIN COUT L1 Q1 Q2 RL MCP19035 HDRV LDRV PHASE IIN ISR IHDRV ILDRV IRR GND Where: IIN = Input Converter current ISR = Current through the Synchronous Rectifier (SR) MOSFET IHDRV and ILDRV = MOSFET drivers’ currents IRR = Current produced by the Reverse Recovery of the SR MOSFET body diode |
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