losses. The load current value where the transition from

fixed-frequency to pulse-skipping operation occurs is the

point where the inductor current goes low enough to cause

the voltage measured across the current sense resistor (R4

or R13) to drop below 25 mV.

In pulse-skipping mode, the high-side FET switch will turn

ON at the beginning of the first clock cycle which occurs after

the voltage at the feedback pin falls below the reference volt-

age. The high-side FET switch remains ON until the voltage

across the current sense resistor rises to 25 mV (and then it

turns OFF).

Ramp Compensation

All current-mode controllers require the use of ramp com-

pensation to prevent subharmonic oscillations, and this com-

pensation is built into the LM2641. The internal compensa-

tion assumes an R

6.8µH, and a maximum output voltage of 6V.

To prevent oscillations, the slope M of the compensation

ramp must be equal to the maximum downward slope of the

voltage waveform at the output of the current sense ampli-

fier. The relationship of the slope M to the external compo-

nents is given by:

M

Where:

M

M

age at the output of the current sense amplifier.

N is the gain of the current sense amplifier.

R

V

L is the inductance of the output inductor.

It is important to note that since the value R

the numerator and L is in the denominator, these two values

may be increased or decreased at the same ratio without

changing the slope.

At higher values of load current, a lower value R

selected. The inductance value for the output inductor

should be decreased by the same percentage to maintain

correct ramp compensation.

Application Information

Improved Transient Response

If the output voltage falls below 97% of the nominal value,

the low-voltage regulation (LREG) comparator will activate

logic which turns ON the high-side FET switch continuously

until the output returns to nominal. The low-side FET switch

is held OFF during this time.

This action will improve transient response since it bypasses

the error amplifier and PWM comparator, forcing the

high-side switch ON until the output returns to nominal. This

feature is disabled during start-up.

Boost High-Side Gate Drive

A “flying” bootstrap capacitor is used to generate the gate

drive voltage used for the high-side FET switch. This boot-

strap capacitor is charged up to about 5V using an internal

supply rail and diode when ever the low-side FET switch is

ON. When the high-side FET switch turns ON, the Source is

pulled up near the input voltage. The voltage across the

bootstrap capacitor boosts up the gate drive voltage, ensur-

ing that the Gate is driven at least 4.3V higher than the

Source.

Reference

The internal bandgap reference is used to generate a 2.5V

reference voltage which is connected to the REF pin. The

operating temperature range, as long as the current drawn is

≤ 5 mA.

A bypass capacitor on the REF pin is not required, but may

be used to reduce noise.

5V LIN Output

The LM2641 contains a built-in 5V/50 mA LDO regulator

whose output is connected to the LIN pin. Since this is an

LDO regulator, it does require an external capacitor to main-

tain stability. A good quality Tantalum capacitor

≥ 4.7µF is

recommended.

Since the current limit for this LDO regulator is set at about

85 mA, it can be used at load currents up to about 50 mA

(assuming total IC power dissipation does not exceed the

maximum value).

Guaranteed specifications are provided for worst-case val-

ues of V

currents up to 25mA (see Electrical Characteristics). To esti-

mate how the V

I

−30mV should be expected due to loading (typical value

only, not guaranteed). This decrease in V

creasing load current.

It must be understood that the maximum allowable current of

50mA must include the current drawn by the gate drive cir-

cuitry. This means that the maximum current available for

use at the LIN pin is 50 mA minus whatever is being used in-

ternally for gate drive.

The amount of current used for gate drive by each switching

output can be calculated using the formula:

I

Where:

I

Q is the gate charge required by the selected FET (see FET

data sheet: Gate Charge Characteristics).

F

Example: As shown in the typical application, if the FET

NDS8410 is used with the LM2641, the turn-on gate voltage

(V

sheet, the curve Gate Charge Characteristics shows that the

gate charge for this value of V

Assuming 300 kHz switching frequency, the gate drive cur-

rent used by each switching output is:

I

= 14.4 mA

If both outputs are switching, the total gate drive current

drawn would be twice (28.8 mA).

Note that in cases where the voltage at switching output #1

is 4.8V or higher, the internal gate drive current is obtained

from that output (which means the full 50 mA is available for

external use at the LIN pin).

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