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AX8052F131 датащи(PDF) 21 Page - ON Semiconductor |
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AX8052F131 датащи(HTML) 21 Page - ON Semiconductor |
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21 / 29 page ![]() AX8052F131 www.onsemi.com 21 TRANSMITTER The transmitter block is controllable through its registers, which are mapped into the X data space of the micro−controller. The transmitter block features its own 32 word × 10 bit FIFO. The microcontroller can either be interrupted at a programmable FIFO fill level, or one of the DMA channels can be instructed to transfer between XRAM and the transmitter FIFO. RF Frequency Generation Subsystem The RF frequency generation subsystem consists of a fully integrated synthesizer, which multiplies the reference frequency from the crystal oscillator to get the desired RF frequency. The advanced architecture of the synthesizer enables frequency resolutions of 1 Hz, as well as fast settling times of 5 – 50 ms depending on the settings (see section AC Characteristics). Fast settling times mean fast start−up, which enables low−power system design. The frequency must be programmed to the desired carrier frequency. The synthesizer loop bandwidth can be programmed, this serves three purposes: 1. Start−up time optimization, start−up is faster for higher synthesizer loop bandwidths 2. TX spectrum optimization, phase−noise at 300 kHz to 1 MHz distance from the carrier improves with lower synthesizer loop bandwidths 3. Adaptation of the bandwidth to the data−rate. For transmission of FSK and MSK it is required that the synthesizer bandwidth must be in the order of the data−rate. VCO An on−chip VCO converts the control voltage generated by the charge pump and loop filter into an output frequency. The frequency can be programmed in 1 Hz steps in the AX5031_FREQ registers. For operation in the 433 MHz band, the BANDSEL bit in the AX5031_PLLLOOP register must be programmed. VCO Auto−Ranging The AX8052F131 has an integrated auto−ranging function, which allows to set the correct VCO range for specific frequency generation subsystem settings automatically. Typically it has to be executed after power−up. The function is initiated by setting the RNG_START bit in the AX5031_PLLRANGING register. The bit is readable and a 0 indicates the end of the ranging process. The RNGERR bit indicates the correct execution of the auto−ranging. Loop Filter and Charge Pump The AX8052F131 internal loop filter configuration together with the charge pump current sets the synthesizer loop band width. The loop−filter has three configurations that can be programmed via the register bits FLT[1:0] in register AX5031_PLLLOOP, the charge pump current can be programmed using register bits PLLCPI[1:0] also in register AX5031_PLLLOOP. Synthesizer bandwidths are typically 50 – 500 kHz depending on the AX5031_PLLLOOP settings, for details see the section: AC Characteristics. Registers Table 16. REGISTERS Register Bits Purpose AX5031_PLLLOOP FLT[1:0] Synthesizer loop filter bandwidth, recommended usage is to increase the bandwidth for faster settling time, bandwidth increases of factor 2 and 5 are possible. PLLCPI[2:0] Synthesizer charge pump current, recommended usage is to decrease the bandwidth (and improve the phase−noise) for low data−rate transmissions. BANDSEL Switches between 868 MHz / 915 MHz and 433 MHz bands AX5031_FREQ Programming of the carrier frequency AX5031_FREQB Programming of the 2nd carrier frequency, switch to this carrier frequency by setting bit FREQSEL = 1 AX5031_PLLRANGING Initiate VCO auto−ranging and check results RF Input and Output Stage (ANTP/ANTN) The AX8052F131 uses fully differential antenna pins. The PA drives the signal generated by the frequency generation subsystem out to the differential antenna terminals. The output power of the PA is programmed via bits TXRNG[3:0] in the register AX5031_TXPWR. Output power as well as harmonic content will depend on the external impedance seen by the PA, recommendations are given in section: Antenna Interface Circuitry. Encoder The encoder is located between the Framing Unit and the Modulator. It can optionally transform the bit−stream in the following ways: • It can invert the bit stream. • It can perform differential encoding. This means that a zero is transmitted as no change in the level, and a one is transmitted as a change in the level. Differential |
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