DM9161E datasheet(26/47 Pages) ETC

26 / 47 page

DM9161

10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver

Final

Version: DM9161-DS-F02

May 10,2002

8.6 Auto-negotiation Link Partner Ability Register (ANLPAR) – 05

This register contains the advertised abilities of the link partner when received during Auto-negotiation.

Bit

Bit Name

Default

Description

5.15

0, RO

Next Page Indication

0 = Link partner, no next page available

1 = Link partner, next page available

5.14

ACK

0, RO

Acknowledge

1 = Link partner ability data reception acknowledged

0 = Not acknowledged

The DM9161's auto-negotiation state machine will automatically

control this bit from the incoming FLP bursts. Software should not

attempt to write to this bit

5.13

0, RO

Remote Fault

1 = Remote fault indicated by link partner

0 = No remote fault indicated by link partner

5.12-5.11

Reserved

0, RO

Reserved

Read as 0, ignore on write

5.10

FCS

0, RO

Flow Control Support

1 = Controller chip supports flow control ability by link partner

0 = Controller chip doesn’t support flow control ability by link partner

5.9

0, RO

100BASE-T4 Support

1 = 100BASE-T4 is supported by the link partner

0 = 100BASE-T4 is not supported by the link partner

5.8

TX_FDX

0, RO

100BASE-TX Full Duplex Support

1 = 100BASE-TX full duplex is supported by the link partner

0 = 100BASE-TX full duplex is not supported by the link partner

5.7

TX_HDX

0, RO

100BASE-TX Support

1 = 100BASE-TX half duplex is supported by the link partner

0 = 100BASE-TX half duplex is not supported by the link partner

5.6

10_FDX

0, RO

10BASE-T Full Duplex Support

1 = 10BASE-T full duplex is supported by the link partner

0 = 10BASE-T full duplex is not supported by the link partner

5.5

10_HDX

0, RO

10BASE-T Support

1 = 10BASE-T half duplex is supported by the link partner

0 = 10BASE-T half duplex is not supported by the link partner

5.4-5.0

Selector

<00000>, RO Protocol Selection Bits

Link partner’s binary encoded protocol selector

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