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CS8416 датащи(PDF) 11 Page - Cirrus Logic |
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CS8416 датащи(HTML) 11 Page - Cirrus Logic |
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11 / 48 page ![]() CS8416 DS578PP2 11 10 F µ CS8416 0.1 F µ 1nF +3.3V A seperate analog supply is only necessary in applications where RMCK is used for a jitter sensitive tast. For applications where RMCK is not used for a jitter sensitive task, connect VA+ to VD+ via a ferrite bead. Keep decoupling capacitors between VA+ and AGND. Please see section 5.1 "8:2 S/PDIF Input Multiplexer" and Appendix A for typical input configurations and recommended input circuits. *** FILT DGND AGND Rflt Cflt Crip *** **** For best jitter performance connect the filter ground directly to the AGND pin. See Table 2 for PLL filter values. **** RXN RXP0 RXP1 RXP2 RXP3 AES3 / S/PDIF Sources Hardware Control RXSEL1 TXSEL0 TXSEL1 NV/RERR 96KHZ RCBL U C Ferrite Bead +3.3V Analog Supply ** OMCK Clock Source RXSEL0 RST AUDIO VA+ VD+ VL+ TX RMCK Clock Control Serial Audio Input Device OLRCK OSCLK SDOUT External Interface 47K Ω These pins must be pulled high to VL+ or low to DGND through a 47K Ω resistor. * ** ** * * * * * * 10 F µ 0.1 F µ 1nF 0.1 F µ 1nF +3.3V to +5V VL+ VL+ Figure 6. Typical Connection Diagram - Hardware Mode |
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