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PI2061 датащи(PDF) 14 Page - Vicor Corporation

номер детали PI2061
подробное описание детали  High Side High Voltage Load Disconnect Switch Controller IC
PDF  16 Pages
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производитель  VICOR [Vicor Corporation]
домашняя страница  http://www.vicorpower.com
Logo VICOR - Vicor Corporation

PI2061 датащи(HTML) 14 Page - Vicor Corporation

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Picor Corporation • picorpower.com
PI2061
Rev 1.4
Page 14 of 16
Enable Input Circuit: EN
Pull EN pin to ground (return) to disable. This can be
accomplished with a signal transistor (Q1) in open
collector configuration and a pull-up resistor REN.
A 5% 360k resistor can be used to pull down on EN pin.
Note that the control signal phase is inverted.
Figure 16: PI2061 in high side +48V application, VC is
biased through a bias resistor
Layout Recommendation:
Use the following general guidelines when designing
printed circuit boards. An example of the typical land
pattern for the PI2061 is shown in Figure 17.
Use a solid ground (return) plane to reduce circuit
parasitics.
Connect Rs terminal at SP pin side, D1 cathode and all
MOSFET source pins together with a wide trace to
reduce trace parasitics and to accommodate the high
current output. Connect Rs terminal at SN pin side to
the load with a wide trace. Also connect all MOSFET
drain pins together with a wide trace to accommodate
the high current input
Kelvin connect SP pin and SN pin to Rs terminals.
The VC bypass capacitor should be located as close as
possible to the VC and SGND pins. Place the PI2061
and VC bypass capacitor on the same layer of the
board.
The VC pin and CVC PCB trace should not
contain any vias.
Dedicate a small copper area on lower layer
underneath the controller for PGND and SGND to
make a single point connection and simplify layout
inter connect. Make sure that Vin to Vout current
return path is solid underneath the MOSFET (M1) and
the sense resistor (R1).
Make sure D1 and D2 connecting traces are very short
to reduce parasitic inductance that might produce
voltage drop due MOSFET fast turn off.
Use 1oz of copper or thicker if possible to reduce trace
resistance and power dissipation.
Figure 17: PI2061 layout recommendation
Vin
PGND
SN
GATE
SGND
PI2061
6
1
7
2
0.1µF
SP
4
EN
5
RTN
VC
3
10K
10m
VC
Vout
D1
7.5K
IRF7853PbF
RS
M1
REN
EN
360K
FT
D2
Not Recommended for New Designs



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