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09/22/00

GL603USB/GL603USB-A/GL603USB-B

Revision 1.4

Differential

Data Lines

Paired

Transitions

Consecutive

Transitions

Figure 4-4 Receiver Jitter Tolerance

The source of data can have some variation (jitter) in the timing of edges of the data transmitted. The time

same capacitive load used for maximum rise and fall times and is measured at the crossover points of the

data lines.

For low-speed transmissions, the jitter time for any consecutive differential data transitions must be within

±25ns and within ±10ns for any set of paired differential data transitions. These jitter numbers include

timing variations due to differential buffer delay, rise/fall time mismatches, internal clock source jitter,

noise and other random effects.

The output rise time and fall time are measured between 10% and 90% of the signal. Edge transition time

and 300ns (maximum) into a capacitive load of 350pF. The rising and falling edges should be transitioning

(monotonic) smoothly when driving the cable to avoid excessive EMI.

Differential

Data Lines

10%

Rise Time

90%

Fall Time

10%

90%

Figure 4-5 Data Signal Rise and Fall Time

4.8.3

Serial Interface Engine (SIE)

The SIE manages data movement between the CPU and the transceiver. The SIE handles both transmit and

receive operations on the USB. It contains the logic used to manipulate the transceiver and the endpoint

registers.