2

LP1030D

Supertex inc.

www.supertex.com

Doc.# DSFP-LP1030D

A031414

Switching Waveforms and Test Circuit

90%

10%

90%

90%

10%

10%

Pulse

Generator

VDD

R

L

OUTPUT

D.U.T.

t

(ON)

t

d(ON)

t

(OFF)

t

d(OFF)

t

f

t

r

INPUT

R

GEN

INPUT

OUTPUT

0V

VDD

0V

-10V

Block Diagram

Sym

Parameter

Min

Typ

Max

Units

Conditions

BV

DSS

Drain-to-source breakdown voltage

-300

-

-

V

V

V

GS(th)

Gate threshold voltage

-1.4

-1.7

-2.4

V

V

ΔV

GS(th)

Change in V

-

-

5.0

mV/°C V

R

GS

Gate-to-source shunt resistor

15

-

45

kΩ

I

V

Z

Gate-to-source Zener voltage

16

-

-

V

I

I

DSS

Zero gate voltage drain current

-

-

-10

µA

V

-

-

-1.0

mA

V

V

I

D(ON)

On-state drain current

-50

-

-

mA

V

R

DS(ON)

Static drain-to-source on-state resistance

-

180

-

Ω

V

C

ISS

Input capacitance

-

10.8

-

pF

V

V

f = 1.0MHz

C

OSS

Common source output capacitance

-

4.2

-

C

RSS

Reverse transfer capacitance

-

3.1

-

t

d(ON)

Turn-on delay time

-

1.0

-

ns

V

I

R

t

r

Rise time

-

11.5

-

t

d(OFF)

Turn-off delay time

-

3.8

-

t

f

Fall time

-

16

-

V

SD

Diode forward voltage drop

-

-

-1.8

V

V

t

rr

Reverse recovery time

-

300

-

ns

V

Notes:

1.

All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)

2.

All A.C. parameters sample tested.

S12

D1

D2

G1

G2