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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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UCS1003-1 датащи(PDF) 49 Page - Microchip Technology |
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UCS1003-1 датащи(HTML) 49 Page - Microchip Technology |
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49 / 138 page  2014-2015 Microchip Technology Inc. DS20005346B-page 49 UCS1003-1/2/3 7.5.2 LATCHED FAULT HANDLING When the LATCH control is high, latch Fault handling is used. When an error condition is detected, the UCS1003-1/2/3 will enter the Error power state and assert the ALERT# pin. Upon command from the host controller (by toggling the PWR_EN control from enabled to disabled or by clearing the ERR bit via SMBus), the UCS1003-1/2/3 will check error conditions once and restore Active operation if error conditions no longer exist. If an error condition still exists, the host controller is required to issue the command again to check error conditions. FIGURE 7-1: Error Recovery Timing (Short-Circuit Example). tRST VBUS IBUS Short Applied ITST tDISCHARGE ITST VTEST Short Detected, VBUS Discharged, Enter Error State Check Short Condition, Short Still Present, Return to Error State Wait tCYCLE Wait tCYCLE Check Short Condition, Short Removed, Return to Normal Operation tCYCLE tCYCLE tRST |
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