ADPD103BCPZ datasheet(29/53 Pages) AD

29 / 53 page

ADPD103

Data Sheet

Rev. B | Page 28 of 52

choice is a function of the margin of headroom needed to

prevent saturation as the dc level fluctuates over time. The SNR

of the PPG waveform is always some percentage of the dc level.

If the target level cannot be achieved at the base gain, increase

the gain and repeat the procedure. The tuning system may need

to place an upper limit on the gain to prevent saturation from

ambient signals.

Tuning the Pulse Count

After the LED peak current and TIA gain are optimized,

increasing the number of pulses per sample increases the SNR

by the square root of the number of pulses. There are two ways to

increase the pulse count. The pulse count registers (Register 0x31,

Bits[15:8], and Register 0x36, Bits[15:8]) change the number of

pulses per internal sample. Register 0x15, Bits[6:4] and Bits[10:8],

controls the number of internal samples that are averaged together

before the data is sent to the output. Therefore, the number of

pulses per sample is the pulse count register multiplied by the

number of subsequent samples being averaged. In general, the

internal sampling rate increases as the number of internal

sample averages increase to maintain the desired output data

rate. The SNR/watt is most optimal with pulse count values of

16 or less. Above pulse count values of 16, the square root

relationship does not hold in the pulse count register. However,

this relationship continues to hold when averaged between

samples using Register 0x15.

Note that increasing LED peak current increases SNR almost

directly proportional to LED power, whereas increasing the

number of pulses by a factor of n results in only a nominal√(n)

increase in SNR.

When using the sample sum/average function (Register 0x15),

the output data rate decreases by the number of summed

samples. To maintain a static output data rate, increase the

sample frequency (Register 0x12) by the same factor as that

selected in Register 0x15. For example, for a 100 Hz output data

rate and a sample sum/average of four samples, set the sample

frequency to 400 Hz.

SINGLE AFE CHANNEL MODE

When using a single photodiode in an application, and that

photodiode is connected to a single AFE channel (see Table 16),

theADPD103 has an option to power down Channel 2, Channel 3,

and Channel 4, which places the device in single AFE channel

mode. Because three of the fourAFE channels are turned off in this

mode, the power consumption is considerably reduced.

It is important to leave the unused input channels floating for

proper device operation. To run the device in singleAFE channel

mode, write 0x38 to Register 0x3C, Bits[8:3]. If it is not required

to run the device in singleAFE channel mode, leave Register 0x3C,

Bits[8:3] at 0x00.

TIA_ADC MODE

There is a way to put the device into a mode that effectively runs

the TIAdirectly in theADC without using the analog band-pass

filter and integrator. This mode is referred to as TIA_ADC mode.

There are two basic applications of TIA_ADC mode. In normal

operation, all of the background light is blocked from the signal

chain, and therefore cannot be measured. TIA_ADC mode can be

used to measure the amount of background/ambient light. This

mode can also be used to measure other dc input currents, such as

leakage resistance.

When the device is in TIA_ADC mode, the band-pass filter and

the integrator stage are bypassed. This effectively wires the TIA

directly into the ADC. At the set sampling frequency, the ADC

samples Channel 1 through Channel 4 (or Channel 5 through

Channel 8) in sequential order, and each sample is taken at 1 µs

intervals. The TIAis in an inverting configuration; therefore, the

signal drops as more light hits the photodiode. Zero light or dark

conditions result in approximately 13,000 LSBs from the ADC.

To put the ADPD103 in TIA_ADC mode during Time Slot A,

write 0xB065 to Register 0x43 to bypass the band-pass filter and

integrator. Similarly, to place the ADPD103 in TIA_ADC mode

during Time Slot B, write 0xB065 to Register 0x45. One way to

monitor dc and pulsed signal at the same time is to operate

TIA_ADC mode in one time slot and pulse mode in the other

time slot. In TIA_ADC mode, increasing light level causes a

decrease in ADC codes because the TIA stage is inverting.

Protecting Against TIA Saturation in Normal Operation

One of the reasons to monitor TIA_ADC mode is to protect

against environments that may cause saturation. One concern

when operating in high light conditions, especially with larger

photodiodes, is that the TIA stage may become saturated and

the ADPD103 continues to communicate data. The resulting

saturation is not typical. The TIA, based on its settings, can only

handle a certain level of photodiode current. Based on the way

theADPD103 is configured, if there is a current level from the

photodiode that is larger than the TIA can handle, the TIA output

during the LED pulse effectively extends the current pulse,

making it wider. The AFE timing is then violated because the

positive portion of the band-pass filter output extends into the

negative section of the integration window. Thus, the photosignal

is subtracted from itself, causing the output signal to decrease

when the effective light signal increases.

To measure the response from the TIA and verify that this stage

is not saturating, place the device in TIA_ADC mode and slightly

modify the timing. Specifically, sweep SLOTx_AFE_OFFSET

until two or three of the four channels reach a minimum value

(note that TIA is in an inverting configuration). All four

channels do not reach this minimum value because, typically, 3 µs

LED pulse widths are used and theADC samples the four channels

sequentially at 1 µs intervals. This procedure aligns the ADC

ADPD103BCPZ датащи(PDF) 29 Page - Analog Devices

ADPD103BCPZ датащи(HTML) 29 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53

датащи скачать

ссылки URL