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ML61Q0409 датащи(PDF) 2 Page - LAPIS Semiconductor Co., Ltd. |
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ML61Q0409 датащи(HTML) 2 Page - LAPIS Semiconductor Co., Ltd. |
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2 / 34 page ![]() FEDL610Q409-05 ML610Q407/ML610Q408/ML610Q409 2/34 • Capture − Time base capture × 2 channels (4096 Hz to 32 Hz) • PWM − Resolution 16 bits × 1 channel • Synchronous serial port − Master/slave selectable × 2 channel − LSB first/MSB first selectable − 8-bit length/16-bit length selectable • UART − Half-Duplex Communication − TXD/RXD × 1 channel − Bit length, parity/no parity, odd parity/even parity, 1 stop bit/2 stop bits − Positive logic/negative logic selectable − Built-in baud rate generator • Melody driver − Scale: 29 types (Melody sound frequency: 508 Hz to 32.768 kHz) − Tone length: 63 types −Tempo: 15 types − Buzzer output mode (4 output modes, 8 frequencies, 16 duty levels) • RC oscillation type A/D converter − 16-bit counter − Time division × 2 channels • General-purpose ports − Input-only port × 5 channels (including secondary functions) − Output-only port ML610Q407: × 12 channels (including secondary functions) ML610Q408: × 8 channels (including secondary functions) ML610Q409: × 4 channels (including secondary functions) − Input/output port × 22 channels (including secondary functions) • LCD driver − The number of segments ML610Q407: 145 dots max. (29seg ×5com, 30seg×4com, 31seg×3com, and 32seg×2com selectable) ML610Q408: 165 dots max. (33seg ×5com, 34seg×4com, 35seg×3com, and 36seg×2com selectable) ML610Q409: 185 dots max. (37seg ×5com, 38seg×4com, 39seg×3com, and 40seg×2com selectable) − 1/1 to 1/5 duty − 1/2(*), 1/3 bias (built-in bias generation circuit) − Frame frequency selecable: approx. 64Hz, 73Hz, 85Hz, and 102Hz − Bias voltage multiplying clock selectable (8 types) − LCD drive stop mode, LCD display mode, all LCDs on mode, and all LCDs off mode selectable − Programmable display allocation function (*) 1/2 bias is supported by A version and D version • Reset − Reset through the RESET_N pin − Power-on reset generation when powered on − Reset when oscillation stop of the low-speed clock is detected (Not supported in A version) − Reset by the watchdog timer (WDT) overflow |
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