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ADP1763ACPZ-R7 датащи(PDF) 6 Page - Analog Devices

номер детали ADP1763ACPZ-R7
подробное описание детали  CMOS Linear Regulator
PDF  19 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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ADP1763ACPZ-R7 датащи(HTML) 6 Page - Analog Devices

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Data Sheet
ADP1763
Rev. 0 | Page 5 of 18
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Rating
VIN to GND
−0.3 V to +2.16 V
EN to GND
−0.3 V to +3.96 V
VOUT to GND
−0.3 V to VIN
SENSE to GND
−0.3 V to VIN
VREG to GND
−0.3 V to VIN
REFCAP to GND
−0.3 V to VIN
VADJ to GND
−0.3 V to VIN
SS to GND
−0.3 V to VIN
PG to GND
−0.3 V to +3.96 V
Storage Temperature Range
−65°C to +150°C
Operating Temperature Range
−40°C to +125°C
Operating Junction Temperature
125°C
Lead Temperature (Soldering, 10 sec)
300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL DATA
Absolute maximum ratings apply only individually, not in
combination. The ADP1763 may be damaged when junction
temperature limits are exceeded. Monitoring ambient temperature
does not guarantee that the junction temperature is within the
specified temperature limits. In applications with high power
dissipation and poor thermal resistance, the maximum ambient
temperature may need to be derated.
In applications with moderate power dissipation and low printed
circuit board (PCB) thermal resistance, the maximum ambient
temperature can exceed the maximum limit as long as the junction
temperature is within specification limits. The junction temperature
(TJ) of the device is dependent on the ambient temperature (TA),
the power dissipation of the device (PD), and the junction to
ambient thermal resistance of the package (θJA). TJ is calculated
using the following formula:
TJ = TA + (PD × θJA)
The junction to ambient thermal resistance (θJA) of the package
is based on modeling and a calculation using a 4-layer board.
The junction to ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending on
PCB material, layout, and environmental conditions. The specified
values of θJA are based on a 4-layer, 4 in × 3 in circuit board. For
details about board construction, refer to JEDEC JESD51-7.
ΨJB is the junction to board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
a calculation using a 4-layer board. The JEDEC JESD51-12
document, Guidelines for Reporting and Using Package Thermal
Information, states that thermal characterization parameters are
not the same as thermal resistances. ΨJB measures the component
power flowing through multiple thermal paths rather than a single
path, as in thermal resistance (θJB). Therefore, ΨJB thermal paths
include convection from the top of the package as well as radiation
from the package, factors that make ΨJB more useful in real-world
applications. The maximum junction temperature (TJ) is calculated
from the board temperature (TB) and power dissipation (PD), using
the following formula:
TJ = TB + (PD × ΨJB)
Refer to the JEDEC JESD51-8 and JESD51-12 documents for
more detailed information about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 5. Thermal Resistance for a 4-Layer 6400 mm2 Copper Size
Package Type
θJA
ΨJB
Unit
16-Lead LFCSP
56
28.4
°C/W
ESD CAUTION



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