MIC45116 datasheet(20/42 Pages) MICROCHIP

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MIC45116

DS20005571A-page 20

 2016 Microchip Technology Inc.

FIGURE 4-2:

MIC45116 Control Loop

Timing.

Figure 4-3 shows the operation of the MIC45116 during

a load transient. The output voltage drops due to the

sudden load increase, which causes the VFB to be less

than VREF. This will cause the error comparator to

trigger an ON-time period. At the end of the ON-time

period, a minimum OFF-time tOFF(MIN) is generated to

charge the bootstrap capacitor (CBST) since the

feedback voltage is still below VREF. Then, the next

ON-time period is triggered due to the low feedback

voltage. Therefore, the switching frequency changes

during the load transient, but returns to the nominal

fixed frequency once the output has stabilized at the

new load current level. With the varying duty cycle and

switching frequency, the output recovery time is fast

and the output voltage deviation is small. Note that the

instantaneous

switching

frequency

during

load

transient remains bounded and cannot increase

arbitrarily. The minimum period is limited by tON +

tOFF(MIN). Because the variation in VOUT is relatively

limited during load transient, tON stays virtually close to

its steady-state value.

FIGURE 4-3:

MIC45116 Load Transient

Response.

Unlike true current-mode control, the MIC45116 uses

the output voltage ripple to trigger an ON-time period.

The output voltage ripple is proportional to the inductor

current ripple if the ESR of the output capacitor is large

enough.

In order to meet the stability requirements, the

MIC45116 feedback voltage ripple should be in phase

with the inductor current ripple and is large enough to

be sensed by the gm amplifier and the error

comparator. The recommended feedback voltage

ripple is 20 mV~100 mV over full input voltage range. If

a low ESR output capacitor is selected, then the

feedback voltage ripple may be too small to be sensed

by the gm amplifier and the error comparator. Also, the

output voltage ripple and the feedback voltage ripple

are not necessarily in phase with the inductor current

ripple if the ESR of the output capacitor is very low. In

these cases, ripple injection is required to ensure

proper operation. Please refer to the Ripple Injection

subsection in the Application Information section for

more details about the ripple injection technique.

4.2

Discontinuous Mode (MIC45116-1

Only)

In continuous mode, the inductor current is always

greater than zero; however, at light loads, the

MIC45116-1 is able to force the inductor current to

operate in discontinuous mode. Discontinuous mode is

where the inductor current falls to zero, as indicated by

trace (IL) shown in Figure 4-4. During this period, the

efficiency is optimized by shutting down all the

non-essential circuits and minimizing the supply

current as the switching frequency is reduced. The

MIC45116-1 wakes up and turns on the high-side

MOSFET when the feedback voltage VFB drops below

0.8V.

The MIC45116-1 has a zero crossing comparator (ZC)

that monitors the inductor current by sensing the

voltage drop across the low-side MOSFET during its

ON-time. If the VFB > 0.8V and the inductor current

goes

slightly

negative,

then

the

MIC45116-1

automatically powers down most of the IC circuitry and

goes into a low-power mode.

Once the MIC45116-1 goes into discontinuous mode,

both low driver (DL) and high driver (DH) are low, which

turns off the high-side and low-side MOSFETs. The

load current is supplied by the output capacitors and

VOUT drops. If the drop of VOUT causes VFB to go below

VREF, then all the circuits will wake up into normal

continuous mode. First, the bias currents of most

circuits reduced during the discontinuous mode are

restored, and then a tON pulse is triggered before the

drivers are turned on to avoid any possible glitches.

Finally, the high-side driver is turned on. Figure 4-4

shows the control loop timing in discontinuous mode.

OUT

REF

ESTIMATED ON TIME

TRIGGER ON-TIME IF V

FB IS BELOW VREF

FB(PP) =

OUT(PP) ×

OUT(PP) = ESRC

OUT

L(PP)

FB2

FB4 + RFB2

L(PP)

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