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OMAP3530ECUS датащи(PDF) 182 Page - Texas Instruments |
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OMAP3530ECUS датащи(HTML) 182 Page - Texas Instruments |
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182 / 265 page ![]() A1 A1 LPDDRDevice RegionshouldencompassallLPDDRcircuitryandvariesdepending onplacement.Non-LPDDRsignalsshouldnotberoutedonthe LPDDRsignallayerswithintheLPDDRkeepoutregion.Non-LPDDR signalsmayberoutedintheregionprovidedtheyareroutedon layersseparatedfromLPDDRsignallayersbyagroundlayer.No breaksshouldbeallowedinthereferencegroundlayersinthis region.Inaddition,the1.8Vpowerplaneshouldcovertheentirekeep outregion. OMAP3530, OMAP3525 SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013 www.ti.com Figure 6-20. LPDDR Keepout Region 6.4.2.5 Net Classes Table 6-17 lists the clock net classes for the LPDDR interface. Table 6-18 lists the signal net classes, and associated clock net classes, for the signals in the LPDDR interface. These net classes are used for the termination and routing rules that follow. Table 6-17. Clock Net Class Definitions CLOCK NET CLASS OMAP PIN NAMES CK sdrc_clk/sdrc_nclk DQS0 sdrc_dqs0 DQS1 sdrc_dqs1 DQS2 sdrc_dqs2 DQS3 sdrc_dqs3 Table 6-18. Signal Net Class Definitions CLOCK NET CLASS ASSOCIATED CLOCK NET CLASS OMAP PIN NAMES sdrc_ba, sdrc_a, sdrc_ncs0, sdrc_ncas, ADDR_CTRL CK sdrc_nras, sdrc_nwe, sdrc_cke0 DQ0 DQS0 sdrc_d, sdrc_dm0 DQ1 DQS1 sdrc_d, sdrc_dm1 DQ2 DQS2 sdrc_d, sdrc_dm2 DQ3 DQS3 sdrc_d, sdrc_dm3 6.4.2.6 LPDDR Signal Termination No terminations of any kind are required in order to meet signal integrity and overshoot requirements. Serial terminators are permitted, if desired, to reduce EMI risk; however, serial terminations are the only type permitted. Table 6-19 shows the specifications for the series terminators. 182 TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS Copyright © 2008–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: OMAP3530 OMAP3525 |
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