LM4817 datasheet(15/21 Pages) NSC

15 / 21 page

Application Information (Continued)

AUDIO POWER AMPLIFIER DESIGN

Audio Amplifier Design: Driving 1W into an 8

Ω Load

The following are the desired operational parameters:

Power Output:

RMS

Load Impedance:

Ω

Input Level:

RMS

Input Impedance:

20k

Ω

Bandwidth:

100Hz−20 kHz ± 0.25 dB

The design begins by specifying the minimum supply voltage

necessary to obtain the specified output power. One way to

find the minimum supply voltage is to use the Output Power

vs Supply Voltage curve in the Typical Performance Char-

acteristics section. Another way, using Equation (4), is to

calculate the peak output voltage necessary to achieve the

desired output power for a given load impedance. To ac-

count for the amplifier’s dropout voltage, two additional volt-

ages, based on the Dropout Voltage vs Supply Voltage in the

Typical Performance Characteristics curves, must be

added to the result obtained by Equation (8). The result in

Equation (9).

(8)

≥ (V

OUTPEAK +(VODTOP +VODBOT))

(9)

The Output Power vs Supply Voltage graph for an 8

Ω load

indicates a minimum supply voltage of 4.6V. This is easily

met by the commonly used 5V supply voltage. The additional

voltage creates the benefit of headroom, allowing the

LM4817 to produce peak output power in excess of 1W

without clipping or other audible distortion. The choice of

supply voltage must also not create a situation that violates

maximum power dissipation as explained above in the

Power Dissipation section.

After satisfying the LM4817’s power dissipation require-

ments, the minimum differential gain is found using Equation

(10).

(10)

Thus, a minimum gain of 2.83 allows the LM4817’s to reach

full output swing and maintain low noise and THD+N perfor-

mance. For this example, let A

VD =3.

The amplifier’s overall gain is set using the input (R

i) and

feedback (R

f) resistors. With the desired input impedance

set at 20k

Ω, the feedback resistor is found using Equation

(11).

f/Ri =AVD/2

(11)

The value of R

f is 30k

Ω.

The last step in this design example is setting the amplifier’s

−3dB frequency bandwidth. To achieve the desired ±0.25dB

pass band magnitude variation limit, the low frequency re-

sponse must extend to at least one−fifth the lower bandwidth

limit and the high frequency response must extend to at least

five times the upper bandwidth limit. The gain variation for

both response limits is 0.17dB, well within the ±0.25dB

desired limit. The results are an

L = 100Hz/5 = 20Hz

(12)

and an

H = 20kHzx5 = 100kHz

(13)

As mentioned in the External Components section, R

and C

i create a highpass filter that sets the amplifier’s lower

bandpass frequency limit. Find the coupling capacitor’s

value using Equation (14).

(14)

the result is

1/(2

π*20kΩ*20Hz) = 0.398µF

(15)

Use a 0.39µF capacitor, the closest standard value.

The product of the desired high frequency cutoff (100kHz in

this example) and the differential gain, A

VD, determines the

upper passband response limit. With A

VD = 3 and fH =

100kHz, the closed-loop gain bandwidth product (GBWP) is

300kHz. This is less than the LM4817’s 3.5MHz GBWP. With

this margin, the amplifier can be used in designs that require

more differential gain while avoiding performance-lrestricting

bandwidth limitations.

LDO General Information

Figure 2 shows the LM4817’s LDO functional block diagram.

A 1.25V bandgap reference, an error amplifier and a PMOS

pass transistor perform voltage regulation while being sup-

ported by shutdown, fault, and the usual Temperature and

current protection circuitry

The regulator’s topology is the classic type with negative

feedback from the output to one of the inputs of the error

amplifier. Feedback resistors R

1 and R2 are either internal or

external to the IC, depending on whether it is the fixed

voltage version or the adjustable version. The negative feed-

back and high open loop gain of the error amplifier cause the

two inputs of the error amplifier to be virtually equal in

voltage. If the output voltage changes due to load changes,

the error amplifier provides the appropriate drive to the pass

transistor to maintain the error amplifier’s inputs as virtually

equal. In short, the error amplifier keeps the output voltage

constant in order to keep its inputs equal.

Output Voltage Setting

The output voltage is set according to the amount of nega-

tive feedback (Note that the pass transistor inverts the feed-

back signal). Figure 3 simplifies the LDO’s topology. This

200781A0

FIGURE 2. LDO Functional Block Diagram

LM4817 датащи(PDF) 15 Page - National Semiconductor (TI)

LM4817 датащи(HTML) 15 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

датащи скачать

ссылки URL