LTC4352 datasheet(13/26 Pages) LINEAR

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LT4356-1/LT4356-2

4356fa

voltage N-channel MOSFETs. For systems with VCC less

than 8V, a logic level MOSFET is required since the gate

drive can be as low as 4.5V.

The SOA of the MOSFET must encompass all fault condi-

tions. In normal operation the pass transistor is fully on,

dissipating very little power. But during either overvoltage

or overcurrent faults, the GATE pin is servoed to regu-

late either the output voltage or the current through the

MOSFET. Large current and high voltage drop across the

MOSFET can coexist in these cases. The SOA curves of

the MOSFET must be considered carefully along with the

selection of the fault timer capacitor.

Transient Stress in the MOSFET

During an overvoltage event, the LT4356 drives a series

pass MOSFET to regulate the output voltage at an acceptable

level. The load circuitry may continue operating throughout

this interval, but only at the expense of dissipation in the

MOSFET pass device. MOSFET dissipation or stress is a

function of the input voltage waveform, regulation voltage

and load current. The MOSFET must be sized to survive

this stress.

Most transient event speciﬁcations use the model shown

in Figure 3. The idealized waveform comprises a linear

ramp of rise time tr, reaching a peak voltage of VPK and

exponentially decaying back to VIN with a time constant

of t. A common automotive transient speciﬁcation has

constants of tr = 10μs, VPK = 80V and τ = 1ms. A surge

condition known as “load dump” has constants of tr =

5ms, VPK = 60V and τ = 200ms.

This ﬁxed early warning period allows the systems to per-

form necessary backup or house-keeping functions before

the power supply is cut off. After VTMR crosses the 1.35V

threshold, the pass transistor turns off immediately. Note

that during an overcurrent event, the timer current is not

reduced to 5μA after VTMR has reached 1.25V threshold,

since it would lengthen the overall fault timer period and

cause more stress on the power MOSFET.

As soon as the fault condition has disappeared, a 2μA

current starts to discharge the timer capacitor to ground.

When VTMR reaches the 0.5V threshold, the internal charge

pump starts to pull the GATE pin high, turning on the

MOSFET. The TMR pin is then actively regulated to 0.5V

until the next fault condition appears. The total cool down

timer period is given by:

tCOOL =

CTMR • 0.85V

2μA

MOSFET Selection

The LT4356 drives an N-channel MOSFET to conduct the

load current. The important features of the MOSFET are

on-resistance RDS(ON), the maximum drain-source voltage

V(BR)DSS, the threshold voltage, and the SOA.

The maximum allowable drain-source voltage must be

higher than the supply voltage. If the output is shorted

to ground or during an overvoltage event, the full supply

voltage will appear across the MOSFET.

The gate drive for the MOSFET is guaranteed to be more

than 10V and less than 16V for those applications with VCC

higher than 8V. This allows the use of standard threshold

APPLICATIONS INFORMATION

Figure 3. Prototypical Transient Waveform

VPK

VIN

4356 F03

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