Philips Semiconductors

Product data sheet

PCA9554/PCA9554A

2004 Sep 30

6

SIMPLIFIED SCHEMATIC OF I/O0 TO I/O7

WRITE PULSE

DATA FROM

SHIFT REGISTER

I/O0 TO I/O7

WRITE

CONFIGURATION

PULSE

D

FF

Q

D

Q

FF

D

Q

FF

D

Q

FF

INPUT PORT

REGISTER

POLARITY

INVERSION

REGISTER

OUTPUT

PORT

REGISTER

DATA FROM

SHIFT REGISTER

DATA FROM

SHIFT REGISTER

WRITE

POLARITY

PULSE

CONFIGURATION

REGISTER

OUTPUT PORT

REGISTER DATA

INPUT PORT

REGISTER DATA

POLARITY

REGISTER DATA

READ PULSE

SU01472

Q

Q

Q

Q

TO INT

100 k

Ω

Q1

Q2

NOTE:

At Power-on Reset, all registers return to default values.

Figure 4. Simplified schematic of I/O0 to I/O7

I/O port

When an I/O is configured as an input, FETs Q1 and Q2 are off,

creating a high-impedance input with a weak pull-up (100 k

Ω typ.) to

5.5 V.

If the I/O is configured as an output, then either Q1 or Q2 is enabled,

depending on the state of the output port register. Care should be

exercised if an external voltage is applied to an I/O configured as an

output because of the low impedance paths that exist between the