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P89LPC930 датащи(PDF) 26 Page - NXP Semiconductors |
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P89LPC930 датащи(HTML) 26 Page - NXP Semiconductors |
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26 / 55 page ![]() Philips Semiconductors P89LPC930/931 8-bit microcontrollers with two-clock 80C51 core Product data Rev. 05 — 15 December 2004 26 of 55 9397 750 14472 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. • External reset pin (during power-up or if user configured via UCFG1. This option must be used for an oscillator frequency above 12 MHz.) • Power-on detect • Brownout detect • Watchdog Timer • Software reset • UART break character detect reset For every reset source, there is a flag in the Reset Register, RSTSRC. The user can read this register to determine the most recent reset source. These flag bits can be cleared in software by writing a ‘0’ to the corresponding bit. More than one flag bit may be set: • During a power-on reset, both POF and BOF are set but the other flag bits are cleared. • For any other reset, previously set flag bits that have not been cleared will remain set. 8.14.1 Reset vector Following reset, the P89LPC930/931 will fetch instructions from either address 0000h or the Boot address. The Boot address is formed by using the Boot Vector as the high byte of the address and the low byte of the address = 00h. The Boot address will be used if a UART break reset occurs, or the non-volatile Boot Status bit (BOOTSTAT.0) = 1, or the device is forced into ISP mode during power-on (see P89LPC930/931 User’s Manual). Otherwise, instructions will be fetched from address 0000H. 8.15 Timers/counters 0 and 1 The P89LPC930/931 has two general purpose counter/timers which are upward compatible with the standard 80C51 Timer 0 and Timer 1. Both can be configured to operate either as timers or event counter. An option to automatically toggle the T0 and/or T1 pins upon timer overflow has been added. In the ‘Timer’ function, the register is incremented every machine cycle. In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition at its corresponding external input pin, T0 or T1. In this function, the external input is sampled once during every machine cycle. Timer 0 and Timer 1 have five operating modes (modes 0, 1, 2, 3 and 6). Modes 0, 1, 2 and 6 are the same for both Timers/Counters. Mode 3 is different. 8.15.1 Mode 0 Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit Counter with a divide-by-32 prescaler. In this mode, the Timer register is configured as a 13-bit register. Mode 0 operation is the same for Timer 0 and Timer 1. 8.15.2 Mode 1 Mode 1 is the same as Mode 0, except that all 16 bits of the timer register are used. |
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