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AS3843D813 датащи(PDF) 12 Page - List of Unclassifed Manufacturers |
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AS3843D813 датащи(HTML) 12 Page - List of Unclassifed Manufacturers |
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12 / 20 page ![]() 12 ASTEC Semiconductor the following paragraphs. The basic operation of the oscillator is as follows: A simple RC network is used to program the fre- quency and the maximum duty ratio of the AS3842 output. See Figure 15. Timing capacitor (C T) is charged through timing resistor (RT) from the fixed 5.0 V at V REG. During the charging time, the OUT (pin 6) is high. Assuming that the output is not terminated by the PWM latch, when the voltage across C T reaches the upper oscillator trip point (Å3.0 V), an internal current sink from pin 4 to ground is turned on and discharges C T towards the lower trip point. During this dis- charge time, an internal clock pulse blanks the output to its low state. When the voltage across C T reaches the lower trip point (Å1.3 V), the cur- rent sink is turned off, the output goes high, and the cycle repeats. Since the output is blanked during the discharge of C T, it is the discharge time which controls the output deadtime and hence, the maximum duty ratio. The nature of the AS3842 oscillator circuit is such that, for a given frequency, many combinations of R T and CT are possible. However, only one value of R T will yield the desired maximum duty ratio at a given frequency. Since a precise maximum duty ratio clamp is critical for many power supply designs, the oscillator discharge current is trimmed in a unique manner which provides sig- nificantly improved tolerances as explained later in this section. In addition, the AS3844/5 options have an internal flip-flop which effectively blanks every other output pulse (the oscillator runs at twice the output frequency), providing an absolute maximum 50% duty ratio regardless of discharge time. 1.3.1 Selecting timing components R T and C T The values of R T and CT can be determined mathematically by the following expressions: (1) AS384x Current Mode Controller 5 V REG OSCILLATOR AS3842 6 OUTPUT 7 V CC 8 R T C T I D 5 GND CLOCK PWM C T OUTPUT Large R T/Small CT C T OUTPUT Small R T/ Large CT 4 Figure 15. Oscillator Set-up and Waveforms C D R R T T T = ƒ = ƒ OSC L H OSC K K ln 1.63D |
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