CFSS-2

Spread Spectrum Oscillator Specification

ISSUE 4; April 2016

Outline (mm) ±0.25% = Centre Spread

Test Circuit

Description

Spread Spectrum surface mount crystal oscillator in a ceramic

package with a hermetically sealed metal lid

±0.25% Centre Spread

±0.5% Centre Spread

±0.75% Centre Spread

±1% Centre Spread

±1.5% Centre Spread

±2% Centre Spread

-0.5% Down Spread

-1% Down Spread

-1.5% Down Spread

-2% Down Spread

-3% Down Spread

-4% Down Spread

Frequency Parameters

Frequency

8.0MHz to 170.0MHz

Frequency Stability

±100.00ppm

±5ppm max per year

Ageing

Electrical Parameters

3.3V ±5%

Supply Voltage

Start Up Time: 10ms max

Power-up time for all Vs to reach minimum specified voltage:

0.05ms to 500ms

Power ramp must be monotonic

Internal Spread Spectrum Modulation Frequency: 30kHz to

33kHz

Operating Temperature Ranges

-10 to 70°C

-40 to 85°C

Output Details

Output Compatability

CMOS

Drive Capability

15pF max

Modulation Ratios:

Centre Spread ±0.25%, ±0.5%, ±0.75%, ±1%, ±1.5%, ±2%

Down Spread -0.5%, -1%, -1.5, -2%, -3%, -4%

Output Control

Tri-state Operation:

Logic '1' (>70%Vs) to pad 1 enables oscillator output

Logic '0' (<30%Vs) to pad 1 disable oscillator output, the

oscillator goes into a high impedance state

No connection to pad 1 enables oscillator output

Spread Spectrum Operation:

Logic '1' to pad 2 (>70% Vs) spread spectrum is off

Logic '0' to pad 2 (<30% Vs) spread spectrum is on

No connection to pad 2 spread spectrum is on

Noise Parameters

Cycle to Cycle Jitter (SS on):

8MHz to <133MHz: 400ps max pk-pk

133MHz to 170MHz: 250ps max pk-pk

Printed on 27 Apr 16 15:13 using Model Data Sheet V1.2550

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