ST92196A datasheet(230/268 Pages) STMICROELECTRONICS

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ELECTRICAL CHARACTERISTICS

AC ELECTRICAL CHARACTERISTICS (Cont’d)

1)The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the unde-

fined region of the falling edge of SCL

2)The maximum hold time of the START condition has only to be met if the interface does not stretch the low period

of SCL signal

Cb = total capacitance of one bus line in pF

Table 45. Characteristics of Analog Input Section

(VDD = 5V, TA = -10°C to 75°C)

Measurement conditions: (*) Same DC level on both comparator inputs AC level 40mV for applicated measurement sig-

nal (**) corresponds to 25 IRE tap voltage

I2C Bus Timings

Symbol

Parameter

Standard I

Fast I

Unit

Min

Max

Min

Max

TBUF

Bus free time between a STOP and START con-

dition

4.7

1.3

THD:STA

Hold time START condition. After this period,

the first clock pulse is generated

4.0

0.6

µs

TLOW

LOW period of the SCL clock

4.7

1.3

µs

THIGH

HIGH period of the SCL clock

4.0

0.6

µs

TSU:STA

Set-up time for a repeated START condition

4.7

0.6

µs

THD:DAT

Data hold time

0 (1)

0.9(2)

TSU:DAT

Data set-up time

250

100

Rise time of both SDA and SCL signals

1000

20+0.1Cb

300

Fall time of both SDA and SCL signals

300

20+0.1Cb

300

TSU:STO

Set-up time for STOP condition

4.0

0.6

Capacitive load for each bus line

400

Parameter

Value

Unit

Min.

Typ.

Max.

Voltage comparator reference voltage:

Unit#1 - Video black level clamp

1.90

2.00

2.10

Unit#2 - Data slicer (**)

2.25

2.35

2.45

Unit#3 - Sync slicer

1.70

1.80

1.90

Voltage comparator delay (all units) (*)

150

200

250

Video clamp:

Sink current (CCVIDEO pin at 2.1V DC)

µA

Source current (CCVIDEO pin at 1.9V DC)

150

300

600

µA

Sink to source current ratio

0.1

0.14

0.18

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