ST92196A datasheet(193/268 Pages) STMICROELECTRONICS

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- SERIAL COMMUNICATIONS INTERFACE (SCI)

SERIAL COMMUNICATIONS INTERFACE (Cont’d)

Figure 83. SCI Functional Schematic

8.11.2 SCI Operation

Each data bit is sampled 16 times per clock period.

Figure 84. SCI Operating Modes

8.11.3 Serial Frame Format

Characters sent or received by the SCI can have

some or all of the features in the following format,

depending on the operating mode:

START: the START bit indicates the beginning of

a data frame. The START condition is detected as

a high to low transition.

DATA: the DATA word length is programmable

from 5 to 8 bits. LSB are transmitted first.

PARITY: The Parity Bit is optional, and can be

used with any word length. It is used for error

checking and is set so as to make the total number

of high bits in DATA plus PARITY odd or even, de-

pending on the number of “1”s in the DATA field.

ADDRESS/9TH: The Address/9th Bit is optional

and may be added to any word format. It is used to

indicate that the data is an address (bit set).

The ADDRESS/9TH bit is useful when several mi-

crocontrollers are exchanging data on the same

serial bus. Individual microcontrollers can stay idle

on the serial bus, waiting for a transmitted ad-

dress. When a microcontroller recognizes its own

address, it can begin Data Reception, likewise, on

the transmit side, the microcontroller can transmit

another address to begin communication with a

different microcontroller.

The ADDRESS/9TH bit can be used as an addi-

tional data bit or to mark control words (9th bit).

STOP: Indicates the end of a data frame. The

STOP bit can be programmed to be 1, 1.5, 2, 2.5

or 3 bits long, depending on the mode. It returns

the SCI to the quiescent marking state (i.e., a con-

stant high-state condition) which lasts until a new

start bit indicates an incoming word.

Figure 85. SCI Character Formats

(1) LSB First

RX shift

TX buffer

TX shift

AEN

RX buffer

Baud rate

generator

INTCLK

LBEN

SOUT

SIN

I/O

CLOCK

START BIT

DATA

PARITY

STOP BIT

VA00271

START

DATA(1)

PARITY

ADDRESS

STOP

# bits

0, 1

5, 6, 7, 8

0, 1

0, 1, 1.5, 2, 2.5

states

NONE

ODD

EVEN

OFF

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