EMC1001

DS20005411A-page 12

 2015 Microchip Technology Inc.

4.6

Register Allocation

The registers shown in Table 4-3 are accessible

through the SMBus.

At device power-up, the default values are stored in all

registers. A Power-on Reset (POR) is initiated when

exceeds the POR threshold. Reads of undefined regis-

ters will return 00h, and writes to undefined registers

will be ignored.

The EMC1001 uses an interlock mechanism that locks

the low-byte value when the high byte register is read.

This prevents updates to the low byte register between

high-byte and low-byte reads. This interlock mecha-

nism requires that the high byte register always be read

prior to reading the low byte register.

TABLE 4-3:

REGISTER MAP

Register Address

(HEX)

Read/Write

Register Name

Power-On Default

00

R

Temperature Value High Byte

0000 0000

01

RC

Status

undefined

02

R

Temperature Value Low Byte

0000 0000

03

R/W

Configuration

0000 0000

04

R/W

Conversion Rate

0000 0100

05

R/W

Temperature High Limit High Byte

0101 0101

(+85°C)

06

R/W

Temperature High Limit Low Byte

0000 0000

07

R/W

Temperature Low Limit High Byte

0000 0000

(0°C)

08

R/W

Temperature Low Limit Low Byte

0000 0000

0F

W

One-Shot

N/A

20

R/W

THERM Limit

0101 0101

(+85°C)

21

R/W

THERM Hysteresis

0000 1010

(+10°C)

22

R/W

SMBus Timeout Enable

1000 0000

FD

R

Product ID Register

0000 0000

(EMC1001)

0000 0001

(EMC1001-1)

FE

R

Manufacture ID

0101 1101

FF

R

Revision Number

0000 0011

(Note 1)

Note 1:

The revision number may change. Please obtain the latest version of this document from the Microchip