DM9081F datasheet(11/22 Pages) ETC

11 / 22 page

DM9081

Final

Version: DM9081-DS-F01

April 22, 1997

AUI Ports Status

The AUI_LED pin transmits the status of DM9081's two

AUI ports on the falling edge of TCK. Figure 5 shows a

typical external hardware setup employed to convert a

serial bit stream into parallel form. The accuracy of the

AUI signals is within 8 Bit Times (BT). The contents of

the output data for the AUI_LED are as followed:

Bit 0: AUI port 1 partition status (0: if partition)

Bit 1: AUI port 1 bit rate error status (0: if bit rate error)

Bit 2: AUI port 1 jabber status (0: if jabber)

Bit 3: AUI port 1 loopback status (0: if loopback error)

Bit 4: AUI port 2 partition status (0: if partition)

Bit 5: AUI port 2 bit rate error status (0: if bit rate error)

Bit 6: AUI port 2 jabber status (0: if jabber)

Bit 7: AUI port 2 loopback status (0: if loopback error)

TP Ports Bit Rate Error Status

The TP_BIT_LED pin sends out global bit rate error

information of the DM9081's Hub.

TP Ports Jabber Status

The TP_JAB_LED pin sends out global jabber information

of the DM9081's Hub.

TP Ports Partition Status

The TP_PAR_LED pin transmits partition information for

the DM9081's eight TP ports on the falling edge of TCK.

Figure 4 shows a typical external hardware configuration

employed to convert the serial bit stream into parallel form.

The accuracy of the partition signals is 8 bit. If a TP port is

in partition status, its corresponding bit is set to low. The

contents of the output data for the TP_PAR_LED are as

followed:

Bit 0: TP port 0 partition status

Bit 1: TP port 1 partition status

Bit 2: TP port 2 partition status

Bit 3: TP port 3 partition status

Bit 4: TP port 4 partition status

Bit 5: TP port 5 partition status

Bit 6: TP port 6 partition status

Bit 7: TP port 7 partition status

Traffic Status

The TRAFFIC_LED pin transmits a utilization report for

the 10MHz bandwidth on the falling edge of TCK. Figure

4 shows a typical external hardware configuration

employed to convert the serial bit stream into parallel form.

The accuracy of the traffic signals is 8 bit. The

corresponding bit is set to low, if the following conditions

are met. The contents of the output data for the

TRAFFIC_LED are as followed:

Bit 0: Over 1% utilization of 10MHz bandwidth

Bit 1: Over 6.25% utilization of 10MHz bandwidth

Bit 2: Over 12.5% utilization of 10MHz bandwidth

Bit 3: Over 25% utilization of 10MHz bandwidth

Bit 4: Over 37.5% utilization of 10MHz bandwidth

Bit 5: Over 50% utilization of 10MHz bandwidth

Bit 6: Over 62.5% utilization of 10MHz bandwidth

Bit 7: Over 87.5% utilization of 10MHz bandwidth

As shown above, if all 8 bits are active low, the utilization

is in excess of 87.5% for the 10MHz bandwidth.

TP Ports Link Status

The TP_LINK_LED transmits link information for the

DM9081's eight TP ports on the falling edge of TCK.

Figure 5 shows a typical external hardware configuration

employed to convert the serial bit stream into parallel form.

The accuracy of the link signals is within 8 bit. If a TP port

is line fail, its corresponding bit is set to high. If a TP port

is line pass, its corresponding bit is set to low. When this

port receives a packet, its corresponding bit is set high for

78ms, then driven low at least 52ms until it responds to

the next packet. The contents of the output data for the

TP_LINK_LED are as followed:

Bit 0: TP port 0 link/receive status

Bit 1: TP port 1 link/receive status

Bit 2: TP port 2 link/receive status

Bit 3: TP port 3 link/receive status

Bit 4: TP port 4 link/receive status

Bit 5: TP port 5 link/receive status

Bit 6: TP port 6 link/receive status

Bit 7: TP port 7 link/receive status

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