FBTH

Css V

1.1

Tss(ms)

Iss

´

´

=

TPS562210, TPS563210

SLVSCM6A – FEBRUARY 2015 – REVISED AUGUST 2015

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Feature Description (continued)

At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after internal one

shot timer expires. This one shot duration is set proportional to the converter input voltage, VIN, and inversely

proportional to the output voltage, VO, to maintain a pseudo-fixed frequency over the input voltage range, hence

it is called adaptive on-time control. The one-shot timer is reset and the high-side MOSFET is turned on again

when the feedback voltage falls below the reference voltage. An internal ramp is added to reference voltage to

simulate output ripple, eliminating the need for ESR induced output ripple from D-CAP2™ mode control.

8.3.2 Soft Start and Pre-Biased Soft Start

The TPS562210 and TPS563210 have adjustable soft-start. When the EN pin becomes high, the SS charge

current (Iss) begins charging the capacitor which is connected from the SS pin to GND (Css). Smooth control of

the output voltage is maintained during start up. The equation for the soft start time, Tss is shown in Equation 1.

(1)

If the output capacitor is pre-biased at startup, the devices initiate switching and start ramping up only after the

converters ramp up smoothly into regulation point.

8.3.3 Power Good

The power good output, PG is an open drain output. The power good function becomes active after 1.7 times

soft-start time. When the output voltage becomes within –10% of the target value, internal comparators detect

power good state and the power good signal becomes high. If the feedback voltage goes under 15% of the target

value, the power good signal becomes low.

8.3.4 Current Protection

The output over-current limit (OCL) is implemented using a cycle-by-cycle valley detect control circuit. The switch

current is monitored during the OFF state by measuring the low-side FET drain to source voltage. This voltage is

proportional to the switch current. To improve accuracy, the voltage sensing is temperature compensated.

During the on time of the high-side FET switch, the switch current increases at a linear rate determined by Vin,

Vout, the on-time and the output inductor value. During the on time of the low-side FET switch, this current

decreases linearly. The average value of the switch current is the load current Iout. If the monitored current is

above the OCL level, the converter maintains low-side FET on and delays the creation of a new set pulse, even

the voltage feedback loop requires one, until the current level becomes OCL level or lower. In subsequent

switching cycles, the on-time is set to a fixed value and the current is monitored in the same manner. If the over

current condition exists consecutive switching cycles, the internal OCL threshold is set to a lower level, reducing

the available output current. When a switching cycle occurs where the switch current is not above the lower OCL

threshold, the counter is reset and the OCL threshold is returned to the higher value.

There are some important considerations for this type of over-current protection. The load current is higher than

the over-current threshold by one half of the peak-to-peak inductor ripple current. Also, when the current is being

limited, the output voltage tends to fall as the demanded load current may be higher than the current available

from the converter. This may cause the output voltage to fall. When the VFB voltage falls below the UVP

threshold voltage, the UVP comparator detects it. And then, the device will shut down after the UVP delay time

(typically 14µs) and re-start after the hiccup time.

When the over current condition is removed, the output voltage returns to the regulated value.

8.3.5 Over Voltage Protection

TPS562210 and TPS563210 detect over voltage condition by monitoring the feedback voltage (VFB). When the

feedback voltage becomes higher than 125% of the target voltage, the OVP comparator output goes high and

the high-side MOSFET is turns off. This function is non-latch operation.

12

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