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ZXLD1356QDACTC датащи(PDF) 2 Page - Diodes Incorporated |
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ZXLD1356QDACTC датащи(HTML) 2 Page - Diodes Incorporated |
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2 / 28 page ![]() ZXLD1356Q Document number: DS37077 Rev. 2 - 2 2 of 28 www.diodes.com October 2015 © Diodes Incorporated ZXLD1356Q Q Pin Descriptions Pin Name Pin Number Function TSOT25 V-DFN3030-6 LX 1 1 Drain of NDMOS Switch GND 2 2, 5 Ground (0V) ADJ 3 3 Multi-Function On/Off and Brightness Control Pin: Leave floating for normal operation. (VADJ = VREF = 1.25V giving nominal average output current IOUTnom = 0.2V/RS) Drive to voltage below 0.2V to turn off output current Drive with DC voltage (0.3V < VADJ < 2.5V) to adjust output current from 24% to 200% of IOUTnom Connect a capacitor from this pin to ground to define soft-start time. Soft-start time is approximately 0.2ms/nF ISENSE 4 4 Connect resistor RS from this to VIN to define nominal average output current IOUTnom = 0.2/RS (Note: RSMIN=0.36V with ADJ pin open circuit) VIN 5 6 Input Voltage (6V to 60V) Decouple to ground with 4.7µF of higher X7R ceramic capacitor close to device Pad — Pad Exposed Pad (EP) - connected to device substrate. To improve thermal impedance of package the EP must be connected to power ground but should not be used as the 0V (GND) current path. It can be left floating but must not be connected to any other voltage other than 0V. Functional Block Diagram Figure 1 Block Diagram - Pin Connections Shown for TSOT25 Package Low voltage detector Voltage regulator LX MN L1 D1 ISENSE Adj Gnd VIN VIN 50K 20K 1.25V 1.35V 0.2V 600KHz + - + - + - R4 R5 R2 R3 R1 2 3 5 4 1 D1 + - RS C1 4.7 mF 5V |
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