PCM1730

SLES021 – NOVEMBER 2001

6

www.ti.com

PARAMETER

TEST CONDITIONS

PCM1730E

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

POWER SUPPLY REQUIREMENTS

VDD

Voltage range

3

3.3

3.6

VDC

VCC

Voltage range

4.75

5

5.25

VDC

fS = 44.1 kHz

7

9.8

IDD

fS = 96 kHz

15

IDD

Supply current

fS = 192 kHz

30

mA

Supply current

fS = 44.1 kHz

33

46.2

mA

ICC

fS = 96 kHz

34.5

ICC

fS = 192 kHz

36.5

fS = 44.1 kHz

188

263

PD

Power dissipation

fS = 96 kHz

222

mW

PD

Power dissi ation

fS = 192 kHz

282

mW

TEMPERATURE RANGE

Operation temperature

–25

85

°C

θJA

Thermal resistance

28-pin SSOP

100

°C/W

functional description

system clock and reset functions

The PCM1730 requires a system clock for operating the digital interpolation filters and advanced segment DAC

modulators. The system clock is applied at the SCKI input (pin 7). The PCM1730 has a system clock detection

of system clock frequencies for common audio sampling rates.

Figure 1 shows the timing requirements for the system clock input. For optimal performance, it is important to

use a clock source with low phase jitter and noise. Texas Instruments’ PLL1700 multi-clock generator is an

excellent choice for providing the PCM1730 system clock.

System Clock

Pulse Cycle Time

System Clock

2 V

0.8 V

tw(SCKH)

tw(SCKL)

PARAMETER

MIN

UNIT

System clock pulse width high, tw(SCKH)

5

ns

System clock pulse width high, tw(SCKL)

5

ns

Figure 1. System Clock Input Timing