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MPC185TS датащи(PDF) 5 Page - Motorola, Inc |
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MPC185TS датащи(HTML) 5 Page - Motorola, Inc |
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5 / 12 page ![]() MOTOROLA MPC185 Security Processor Technical Summary 5 Each data packet descriptor contains the following: • Header—The header describes the required services and encodes information that indicates which EUs to use and which modes to set. • Seven data length/data pointer pairs—The data length indicates the number of contiguous bytes of data to be transferred. The data pointer indicates the starting address of the data, key, or context in system memory. • Next descriptor pointer A data packet descriptor ends with a pointer to the next data packet descriptor. Upon completion of the current descriptor, this field is checked and, if non-zero, the channel is instructed to request a burst read of the next descriptor. Processing of the next descriptor (and whether or not a done signal is generated) is determined by the programming of crypto-channel’s configuration register. Two modes of operation are supported: • Signal done at end of descriptor • Signal done at end of descriptor chain The crypto-channel can signal done via an interrupt or by a write-back of the descriptor header after processing a data packet descriptor. The value written back is identical to that of the header, with the exception that a DONE field is set. Occasionally, a descriptor field may not be applicable to the requested service. For example, if using DES in ECB mode, the contents of the IV field do not affect the result of the DES computation. Therefore, when processing data packet descriptors, the crypto-channel skips any pointer that has an associated length of zero. 6.1 60x Interface The 60x interface manages communication between the MPC185 internal execution units and the 60x bus. The interface uses the 60x bus master/slave protocols. All on-chip resources are memory mapped, and the target accesses and initiator writes from the MPC185 must be addressed on word boundaries. The MPC185 will perform initiator reads on byte boundaries and will adjust the data to place on word boundaries as appropriate. Access to system memory is a critical factor in co-processor performance, and the native 60x interface of the MPC185 allows it to achieve performance unattainable on secondary busses. LEN_DATAOUT PTR_DATAOUT Length Pointer Number of bytes of data after ciphering Pointer to location where cipher output is to be written LEN_CTXOUT PTR_CTXOUT Length Pointer Length of output Context (IV) Pointer to location where altered Context is to be written Nul length Nul pointer Length Pointer Zeroes for fixed length descriptor filter Zeroes for fixed length descriptor filter Nul length Nul pointer Length Pointer Zeroes for fixed length descriptor filter Zeroes for fixed length descriptor filter PTR_NEXT Pointer Pointer to next data packet descriptor Table 6-1. Example Data Packet Descriptor Field Name Value/Type Description Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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