14

FN7045.2

April 21, 2005

Noise Calculations

The primary application for the EL2125 is to amplify very

small signals. To maintain the proper signal-to-noise ratio, it

is essential to minimize noise contribution from the amplifier.

Figure 51 below shows all the noise sources for all the

components around the amplifier.

FIGURE 51.

where:

• T is temperature in degrees Kelvin (273+ °C)

The total noise due to the amplifier seen at the output of the

amplifier can be calculated by using the equation below

(Figure 52).

As the equation shows, to keep noise at a minimum, small

resistor values should be used. At higher amplifier gain

starts to dominate. Because noise is summed in a root-

mean-squares method, noise sources smaller than 25% of

the largest noise source can be ignored. This can greatly

simplify the formula and make noise calculation much easier

to calculate.

Output Drive Capability

The EL2125 is designed to drive low impedance load. It can

drive capability makes the EL2125 an ideal choice for RF, IF,

and video applications. Furthermore, the EL2125 is current-

limited at the output, allowing it to withstand momentary

short to ground. However, the power dissipation with output-

shorted cannot exceed the power dissipation capability of

the package.

Driving Cables and Capacitive Loads

Although the EL2125 is designed to drive low impedance

load, capacitive loads will decrease the amplifier's phase

margin. As shown the in the performance curves, capacitive

load can result in peaking, overshoot and possible

oscillation. For optimum AC performance, capacitive loads

should be reduced as much as possible or isolated with a

series resistor between 5

Ω to 20Ω. When driving coaxial

cables, double termination is always recommended for

reflection-free performance. When properly terminated, the

capacitance of the coaxial cable will not add to the capacitive

load seen by the amplifier.

Power Supply Bypassing And Printed Circuit

Board Layout

As with any high frequency devices, good printed circuit

board layout is essential for optimum performance. Ground

plane construction is highly recommended. Lead lengths

should be kept as short as possible. The power supply pins

must be closely bypassed to reduce the risk of oscillation.

The combination of a 4.7µF tantalum capacitor in parallel

with 0.1µF ceramic capacitor has been proven to work well

when placed at each supply pin. For single supply operation,

4.7µF tantalum capacitor in parallel with a 0.1µF ceramic

For good AC performance, parasitic capacitance should be

kept to a minimum. Ground plane construction again should

be used. Small chip resistors are recommended to minimize

series inductance. Use of sockets should be avoided since

they add parasitic inductance and capacitance which will

result in additional peaking and overshoot.

Supply Voltage Range and Single Supply

Operation

The EL2125 has been designed to operate with supply

voltage range of ±2.5V to ±15V. With a single supply, the

EL2125 will operate from +5V to +30V. Pins 4 and 7 are the

power supply pins. The positive power supply is connected

to pin 7. When used in single supply mode, pin 4 is

connected to ground. When used in dual supply mode, the

negative power supply is connected to pin 4.

As the power supply voltage decreases from +30V to +5V, it

becomes necessary to pay special attention to the input

-

+

V

RX

4kTRx

=

V

ON

BW

=

VN

2

1

R

1

R

2

-------

+





×

IN-

2

R

1

2

IN+

2

R

3

2

1

R

1

R

2

-------

+





×

×

+

×

4KTR

1

4KTR

2

R

1

R

2

-------





×

×

×

×

+

×

×

×

4K

T

R

3

1

R

1

R

2

-------

+





×

×

×

×

++

+













×

FIGURE 52.

EL2125