13 / 19 page
USE ULTRA37000™ FOR
ALL NEW DESIGNS
CY7C343
Document #: 38-03015 Rev. *B
Page 13 of 19
tCH
Clock HIGH Time
Com’l/Ind
10
12.5
ns
Mil
10
12.5
tCL
Clock LOW Time
Com’l/Ind
10
12.5
ns
Mil
10
12.5
tIC
Asynchronous Clock Logic Delay
Com’l/Ind
16
18
ns
Mil
16
18
tICS
Synchronous Clock Delay
Com’l/Ind
2
3
ns
Mil
2
3
tFD
Feedback Delay
Com’l/Ind
1
2
ns
Mil
1
2
tPRE
Asynchronous Register Preset Time
Com’l/Ind
6
7
ns
Mil
6
7
tCLR
Asynchronous Register Clear Time
Com’l/Ind
6
7
ns
Mil
6
7
tPCW
Asynchronous Preset and Clear Pulse Width Com’l/Ind
6
7
ns
Mil
6
7
tPCR
Asynchronous Preset and Clear Recovery
Time
Com’l/Ind
6
7
ns
Mil
6
7
tPIA
Programmable Interconnect Array Delay Time Com’l/Ind
16
20
ns
Mil
16
20
Internal Switching Characteristics Over Operating Range (continued)[7]
Parameter
Description
7C343-30
7C343-35
Unit
Min.
Max.
Min.
Max.
Switching Waveforms
External Combinatorial
tPD1 /tPD2
t ER
VALID OUTPUT
DEDICATED INPUT/
I/O INPUT
COMBINATORIAL
OUTPUT
COMBINATORIAL OR
REGISTERED
HIGH-IMPEDANCE
THREE-STATE
HIGH-IMPEDANCE
THREE–STATE
OUTPUT
t ER
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
