CDC5801

LOW JITTER CLOCK MULTIPLIER AND DIVIDER WITH

PROGRAMMABLE DELAY AND PHASE ALIGNMENT

SCAS682A – OCTOBER 2002

12

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

CLKOUTB

CLKOUT

tcycle,i

tcycle,i+1

Cycle-to-Cycle Jitter = | tcycle,i – tcycle,i+r| Over 1000 Consecutive Cycles

Figure 2. Cycle-to-Cycle Jitter

CLKOUT

CLKOUTB

tpw+

tcycle

Duty Cycle = (tpw+/tcycle)

Figure 3. Output Duty Cycle

CLKOUT

CLKOUTB

VX+

VX, nom

VX–

Figure 4. Crossing-Point Voltage

80%

tf

tr

20%

VOL

VOH

Figure 5. Voltage Waveforms

PWRDNB

CLKOUT/

CLKOUTB

t(power down)

t(power up)

Figure 6. PWRDNB Transition Timings