PC87591L datasheet(167/437 Pages) NSC

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Embedded Controller Modules (Continued)

Revision 1.07

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Timer and WATCHDOG Clock Pre-Scaler Register (TWCP)

The TWCP register is a byte-wide, read/write register. It defines the pre-scale ratio of the input clock and generates the T0IN

clock. On reset, the non-reserved bits of TWCP are initialized to 0.

Location: 00 FEE216

Type: R/W

TWD Timer 0 Register (TWDT0)

The TWDT0 register is a read/write register. It defines the T0OUT interrupt rate. On reset, this register is initialized to

FFFF16.

Location: 00 FEE416

Type: R/W

WDSDME. Selects the WATCHDOG touch mechanism

0: Disables the WATCHDOG service using WDSDM register. In this case, the WATCHDOG should be serviced

by writing a value to WDCNT register. When this bit is cleared, write operations to WDSDM are ignored.

1: Selects the use of data match using the WDSDM mechanism.

7-6

Reserved.

Bit

76543210

Name

Reserved

MDIV

Reset

00000000

Bit

Description

2-0

MDIV. Deﬁnes the pre-scale ratio of the input clock. The pre-scale ratio is 2MDIV. The value of MDIV must be in

the range of 0-5, providing a pre-scale ratio of 1 to 32.

MDIV allowed values:

Bits

2 1 0

Clock Ratio

0 0 0:

1:1

0 0 1:

1:2

0 1 0:

1:4

0 1 1:

1:8

1 0 0:

1:16

1 0 1:

1:32

Other

Reserved

7-3

Reserved.

Bit

Name

PRESET

Reset

Bit

Description

15-0

PRESET. Deﬁnes the counter preset value. Whenever the counter reaches zero, it starts counting down from

this value. The T0OUT frequency is the T0IN frequency divided by (PRESET+1). The allowed values of the

PRESET ﬁeld are 000116 through FFFF16.

Bit

Description

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