| поискавой системы для электроныых деталей |
|
PC87591L датащи(PDF) 148 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
PC87591L датащи(HTML) 148 Page - National Semiconductor (TI) |
|
148 / 437 page ![]() Embedded Controller Modules (Continued) www.national.com 148 Revision 1.07 4.8.3 Cycle Time and Duty Cycle Calculation The PWM module supports duty cycles in the range of 0% to 100%. The PWMi output signal cycle time is: (PRSC + 1) x (CTR + 1) x TCLK where: ● TCLK is the core domain clock cycle time (i.e., the PWM input clock). ● The cycle time may range from 2 x TCLK to 65536 x TCLK. The PWMi output signal duty cycle (in %, when INVPi is 0) is: (DCRi + 1) / (CTR + 1) x 100. Special cases: ● If the DCRi value is greater than the CTR value, PWMi signal is always low. ● If DCRi value is equal to the CTR value, PWMi signal is always high. When Inverse PWMi bit is 1, the value of PWMi output is inverted. i.e., in the period described as 1 is 0 and vice versa. 4.8.4 Power Modes The PWM is in Low Power mode when Power Mode bit (PWR) in PWM Control Register (PWMCNT) is 0. In this mode, the PWM input clock is disabled (stopped), but the registers are accessible and maintained. The PWMi signal is 0 when INVPi bit is 0; it is 1 when INVPi bit is 1. The PWM is in normal power mode when PWR bit in PWMCNT register is 1. In this mode, the PWM module is enabled, its registers are accessible and its clock is functional. The PRSC and CTR registers should be updated during Low Power mode. Otherwise, there may be unpredictable transient behavior. 4.8.5 PWM Registers For a summary of the abbreviations used for Register Type, see “Register Abbreviations and Access” on page 34. PWM Register Map Clock Pre-Scaler Register (PRSC) The PRSC register controls the cycle time and the minimal pulse width. PRSC is cleared (0016) on reset. Location: 00 FD0016 Type: R/W Mnemonic Register Name Type PRSC Clock Pre-Scaler R/W CTR Cycle Time R/W DCRi Duty Cycle 0 to 7 R/W PWMPOL PWM Polarity R/W PWMCNT PWM Control R/W Bit 76543210 Name PRSC7-0 Reset 00000000 Bit Description 7-0 Pre-Scaler Divider Value. The divider of the PWM input clock is the number defined by PRSC7-0 + 1, e.g., a value of 0016 results in a divide by 1, a value of FF16 results in a divide by 256. The contents of this register may be changed only when the PWM module is in Low Power mode. Otherwise, there may be unpredictable results. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |