DS90CF581 Pin Description — FPD Link Transmitter

Pin Name

I/O

No.

Description

TxIN

I

28

TTL level input. This includes: 8 Red, 8 Green, 8 Blue, and 4 control lines (FPLINE,

FPFRAME, DRDY, CNTL). (Also referred to as HSYNC, VSYNC and DATA ENABLE)

TxOUT+

O

4

Positive LVDS differential data output

TxOUT−

O

4

Negative LVDS differential data output

FPSHIFT IN

I

1

TTL level clock input. The falling edge acts as data strobe.

TxCLK OUT+

O

1

Positive LVDS differential clock output

TxCLK OUT−

O

1

Negative LVDS differential clock output

PWR DOWN

I

1

TTL level input. Assertion (low input) TRI-STATE the outputs, ensuring low current at power

down.

V

CC

I

4

Power supply pins for TTL inputs

GND

I

5

Ground pins for TTL inputs

PLL V

CC

I

1

Power supply pin for PLL

PLL GND

I

2

Ground pins for PLL

LVDS V

CC

I

1

Power supply pin for LVDS outputs

LVDS GND

I

3

Ground pins for LVDS outputs

DS012486-26

FIGURE 11. Transmitter LVDS Output Pulse Position Measurement

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