GS1675 datasheet(13/37 Pages) SEMTECH

13 / 37 page

GS1675 SD/HD SDI Reclocker

Data Sheet

54174 - 1

June 2011

13 of 37

The LOS mode can be selected using the host interface, in register TOP_1. The LOS

detector has two major modes. In legacy mode, a simple edge-based detector is used to

monitor the received signal at the output of the data slicer. Since the incoming signal has

undergone considerable gain by this point, the legacy detector can be more susceptible

to false de-assertion of LOS for unused channels which experience significant cross-talk

from adjacent active channels.

The new LOS detector uses a measure of both signal amplitude and duration to minimize

false detection of the impulse like signals that are characteristic of cross-talk. In this

mode, the signal is tapped off at the output of the equalizer stage, prior to the high gain

buffers.

The threshold setting within the detector can be adjusted to increase or decrease its

sensitivity. Higher sensitivity allows lower amplitude signals to be detected but also

increases the susceptibility to false de-assertion of LOS due to noise or cross-talk.

Therefore the lowest sensitivity acceptable for a given application should always be

used. See TOP_1 register, bits 8:7, in the host register map.

NOTE:

It is also possible to have both legacy mode & threshold mode enabled together.

In this case, the reclocker must detect transitions within a set window, and the signal

amplitude must be greater than the setting for the LOS threshold.

3.6 Serial Digital Reclocker

The output of the Equalizer is fed to the reclocker. The function of the reclocker is to

re-time the input signal and to generate system clocks.

The reclocker operates at two data rates; 1.485Gb/s and 270Mb/s, and provides a

minimum input jitter tolerance of 0.8UI to square-wave-modulated jitter.

When there is no serial input signal, the internal clock maintains a frequency close to the

expected incoming data rate by locking to the external reference crystal.

3.7 Lock Detection

The lock detect block indicates, via the active-high LOCKED signal, when the device has

achieved lock to the incoming data stream.

The lock logic within the GS1675 includes a system that monitors the frequency and the

phase of the incoming data, as well as a monitor to detect harmonic lock.

The LOCKED output signal is also available via the host interface.

Table 3-3: Lock Operation

LOCKED

Status

HIGHLocked

LOW

Not locked

GS1675 датащи(PDF) 13 Page - Semtech Corporation

GS1675 датащи(HTML) 13 Page - Semtech Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37

датащи скачать

ссылки URL