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DS90C032BTM датащи(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
номер детали DS90C032BTM
подробное описание детали  LVDS Quad CMOS Differential Line Receiver
PDF  9 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

DS90C032BTM датащи(HTML) 3 Page - National Semiconductor (TI)

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Switching Characteristics
V
CC = +5.0V, TA = +25˚C (Notes 3, 4, 9)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PHLD
Differential Propagation Delay High to Low
C
L = 5 pF
1.5
3.40
5.0
ns
t
PLHD
Differential Propagation Delay Low to High
V
ID = 200 mV
1.5
3.48
5.0
ns
t
SKD
Differential Skew |t
PHLD −tPLHD|(Figure 1 and Figure 2)
0
80
600
ps
t
SK1
Channel-to-Channel Skew (Note 5)
0
0.6
1.0
ns
t
TLH
Rise Time
0.5
2.0
ns
t
THL
Fall Time
0.5
2.0
ns
t
PHZ
Disable Time High to Z
R
L = 2kΩ
10
15
ns
t
PLZ
Disable Time Low to Z
C
L = 10 pF
10
15
ns
t
PZH
Enable Time Z to High
(
Figure 3 and Figure 4)
4
10
ns
t
PZL
Enable Time Z to Low
410
ns
Switching Characteristics
V
CC = +5.0V ± 10%,TA = −40˚C to +85˚C (Notes 3, 4, 9)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PHLD
Differential Propagation Delay High to Low
C
L = 5 pF
1.0
3.40
6.0
ns
t
PLHD
Differential Propagation Delay Low to High
V
ID = 200 mV
1.0
3.48
6.0
ns
t
SKD
Differential Skew |t
PHLD −tPLHD|(Figure 1 and Figure 2)
0
0.08
1.2
ns
t
SK1
Channel-to-Channel Skew (Note 5)
0
0.6
1.5
ns
t
SK2
Chip to Chip Skew (Note 6)
5.0
ns
t
TLH
Rise Time
0.5
2.5
ns
t
THL
Fall Time
0.5
2.5
ns
t
PHZ
Disable Time High to Z
R
L = 2kΩ
10
20
ns
t
PLZ
Disable Time Low to Z
C
L = 10 pF
10
20
ns
t
PZH
Enable Time Z to High
(
Figure 3 and Figure 4)
4
15
ns
t
PZL
Enable Time Z to Low
415
ns
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground unless otherwise speci-
fied.
Note 3: All typicals are given for: VCC = +5.0V, TA = +25˚C.
Note 4: Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50Ω,tr and tf (0%–100%) ≤ 1 ns for RIN and tr and tf ≤ 6 ns for EN or EN*.
Note 5: Channel-to-Channel Skew is defined as the difference between the propagation delay of one channel and that of the others on the same chip with an event
on the inputs.
Note 6: Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
Note 7: ESD Rating:
HBM (1.5 k
Ω, 100 pF) ≥ 2kV
EIAJ (0
Ω, 200 pF) ≥ 250V
Note 8: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at a time, do not ex-
ceed maximum junction temperature specification.
Note 9: CL includes probe and jig capacitance.
Parameter Measurement Information
DS100990-3
FIGURE 1. Receiver Propagation Delay and Transition Time Test Circuit
www.national.com
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