OPA692 datasheet(20/22 Pages) TI

20 / 22 page

OPA690

SBOS223A

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FIGURE 15. Internal ESD Protection.

External

–V

Internal

Circuitry

d) Connections to other wideband devices on the board

may be made with short, direct traces or through onboard

transmission lines. For short connections, consider the trace

and the input to the next device as a lumped capacitive load.

Relatively wide traces (50mils to 100mils) should be used,

preferably with ground and power planes opened up around

them. Estimate the total capacitive load and set RS from the

plot of Recommended RS vs Capacitive Load. Low parasitic

capacitive loads (< 5pF) may not need an RS since the

OPA690 is nominally compensated to operate with a 2pF

parasitic load. Higher parasitic capacitive loads without an RS

are allowed as the signal gain increases (increasing the

unloaded phase margin). If a long trace is required, and the

6dB signal loss intrinsic to a doubly terminated transmission

line is acceptable, implement a matched impedance trans-

mission line using microstrip or stripline techniques (consult

an ECL design handbook for microstrip and stripline layout

techniques). A 50

Ω environment is normally not necessary

on board, and in fact, a higher impedance environment will

improve distortion as shown in the distortion versus load

plots. With a characteristic board trace impedance defined

(based on board material and trace dimensions), a matching

series resistor into the trace from the output of the OPA690

is used as well as a terminating shunt resistor at the input of

the destination device. Remember also that the terminating

impedance will be the parallel combination of the shunt

resistor and the input impedance of the destination device;

this total effective impedance should be set to match the

trace impedance. The high output voltage and current capa-

bility of the OPA690 allows multiple destination devices to be

handled as separate transmission lines, each with their own

series and shunt terminations. If the 6dB attenuation of a

doubly-terminated transmission line is unacceptable, a long

trace can be series-terminated at the source end only. Treat

the trace as a capacitive load in this case and set the series

resistor value as shown in the plot of “Recommended RS vs

Capacitive Load”. This will not preserve signal integrity as

well as a doubly-terminated line. If the input impedance of the

destination device is low, there will be some signal attenua-

tion due to the voltage divider formed by the series output

into the terminating impedance.

e) Socketing a high-speed part like the OPA690 is not

recommended. The additional lead length and pin-to-pin

capacitance introduced by the socket can create an ex-

tremely troublesome parasitic network which can make it

almost impossible to achieve a smooth, stable frequency

response. Best results are obtained by soldering the OPA690

onto the board.

INPUT AND ESD PROTECTION

The OPA690 is built using a very high-speed complementary

bipolar process. The internal junction breakdown voltages

are relatively low for these very small geometry devices.

These breakdowns are reflected in the Absolute Maximum

Ratings table. All device pins are protected with internal

ESD protection diodes to the power supplies as shown in

Figure 15.

These diodes provide moderate protection to input overdrive

voltages above the supplies as well. The protection diodes

can typically support 30mA continuous current. Where higher

currents are possible (e.g., in systems with

±15V supply

parts driving into the OPA690), current-limiting series resis-

tors should be added into the two inputs. Keep these resistor

values as low as possible since high values degrade both

noise performance and frequency response.

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