13

®

OPA686

output power and frequency. Finally, the distortion increases

as the fundamental frequency increases due to the rolloff in

the loop gain with frequency. Conversely, the distortion will

improve going to lower frequencies down to the dominant

open-loop pole at approximately 100kHz. Starting from the

–82dBc 2nd harmonic for a 5MHz, 2Vp-p fundamental into

a 200

Ω load at G = +10 (from the Typical Performance

Curves), the 2nd harmonic distortion for frequencies lower

than 100kHz will be approximately –82dBc – 20log(5MHz/

100kHz) = –116dBc.

The OPA686 has extremely low 3rd-order harmonic distor-

tion. This also gives a high two-tone, 3rd-order

intermodulation intercept as shown in the Typical Perfor-

mance Curves. This intercept curve is defined at the 50

Ω

load when driven through a 50

Ω matching resistor to allow

direct comparisons to RF MMIC devices. This matching

network attenuates the voltage swing from the output pin to

the load by 6dB. If the OPA686 drives directly into the input

of a high impedance device, such as an ADC, the 6dB

attenuation is not taken. Under these conditions, the inter-

cept will increase by a minimum 6dBm. The intercept is

used to predict the intermodulation spurious for two, closely-

between two equal test-tone power levels and these

intermodulation spurious power levels is given by

∆dBc = 2 • (IM3 – P

dBm at the 50

Ω load for one of the two closely-spaced test

frequencies. For instance, at 5MHz the OPA686 at a gain of

+10 has an intercept of 48dBm at a matched 50

Ω load. If the

full envelope of the two frequencies needs to be 2Vp-p, this

requires each tone to be 4dBm. The 3rd-order intermodulation

spurious tones will then be 2 • (48 – 4) = 88dBc below the

test-tone power level (–84dBm). If this same 2Vp-p, two-

tone envelope were delivered directly into the input of an

ADC—without the matching loss or the loading of the 50

Ω

network—the intercept would increase to at least 54dBm.

With the same signal and gain conditions, but now driving

directly into a light load, the spurious tones will then be at

least 2 • (54 – 4) = 100dBc below the 4dBm test-tone power

levels centered on 5MHz.

DC ACCURACY AND OFFSET CONTROL

The OPA686 can provide excellent DC signal accuracy due

to its high open-loop gain, high common-mode rejection,

high power supply rejection, and low input offset voltage

and bias current offset errors. To take full advantage of its

low

±1.5mV input offset voltage, careful attention to input

bias current cancellation is also required. The low noise

input stage of the OPA686 has a relatively high input bias

current (10

µA typical into the pins) but with a very close

match between the two input currents—typically

±100nA

input offset current. The total output offset voltage may be

reduced considerably by matching the source impedances

looking out of the two inputs. For example, one way to add

bias current cancellation to the circuit of Figure 1 would be

to insert a 20

Ω series resistor into the non-inverting input

from the 50

Ω terminating resistor. When the 50Ω source

resistor is DC-coupled, this will increase the source resis-

tances for the non-inverting input bias current to 45

Ω. Since

this is now equal to the resistance looking out of the

the bias currents to the output leaving only the offset current

times the feedback resistor as a residual DC error term at the

output. Using the 453

Ω feedback resistor, this output error

will now be less than

±0.9µA • 453Ω = ±0.4mV over the full

temperature range.

A fine-scale, output offset null, or DC operating point

adjustment, is often required. Numerous techniques are

available for introducing a DC offset control into an op amp

circuit. Most of these techniques eventually reduce to setting

up a DC current through the feedback resistor. One key

consideration to selecting a technique is to insure that it has

a minimal impact on the desired signal path frequency

response. If the signal path is intended to be non-inverting,

the offset control is best applied as an inverting summing

signal to avoid interaction with the signal source. If the

signal path is intended to be inverting, applying the offset

control to the non-inverting input can be considered. For a

DC-coupled inverting input signal, this DC offset signal will

set up a DC current back into the source that must be

considered. An offset adjustment placed on the inverting op

amp input can also change the noise gain and frequency

response flatness. Figure 8 shows one example of an offset

adjustment for a DC-coupled signal path that will have

minimum impact on the signal frequency response. In this

case, the input is brought into an inverting gain resistor with

the DC adjustment an additional current summed into the

inverting node. The resistor values setting this offset adjust-

ment are much larger than the signal path resistors. This will

insure that this adjustment has minimal impact on the loop

gain and hence, the frequency response.

FIGURE 8. DC-Coupled, Inverting Gain of –20, with

Output Offset Adjustment.

R

F

1k

Ω

±200mV Output Adjustment

= –

= –20

Supply Decoupling

Not Shown

5k

Ω

5k

Ω

48

Ω

0.1µF

R

G

50

Ω

V

I

20k

Ω

10k

Ω

0.1µF

–5V

+5V

OPA686

+5V

–5V

V

O

V

O

V

I

R

F

R

G