OPA569 datasheet(17/28 Pages) TI1

17 / 28 page

OPA569

SBOS264A

www.ti.com

Junction temperature should be kept below 125

°C for reliable

operation. The junction temperature can be calculated by:

TJ = TA + PDθJA

where

JA = θJC + θCA

TJ = Junction Temperature (°C)

TA = Ambient Temperature (°C)

PD = Power Dissipated (W)

JA = Junction-to-Ambient Thermal Resistance

JC = Junction-to-Case Thermal Resistance

CA = Case-to-Air Thermal Resistance

The Maximum Power Dissipation vs Temperature for the

heatsinking methods listed in Figure 10 is shown in Figure 11.

To appropriately determine required heatsink area, required

power dissipation should be calculated and the relationship

between power dissipation and thermal resistance should be

considered to minimize shutdown conditions and allow for

proper long-term operation (junction temperature of 125

°C).

Once the heatsink area has been selected, worst-case load

conditions should be tested to ensure proper thermal protec-

tion.

For applications with limited board size, refer to Figure 12 for

the approximate thermal resistance relative to heatsink area.

Increasing the heatsink area beyond 2in2 provides little

improvement in thermal resistance. To achieve the 21.5

°C/W

stated in the Electrical Characteristics, a copper plane size of

9in2 was used. The SO-20 PowerPAD package is well suited

for continuous power levels, as shown in Figure 11. Higher

power levels may be achieved in applications with a low

on/off duty cycle.

FIGURE 11. Maximum Power Dissipation vs Temperature.

FEEDBACK CAPACITOR IMPROVES RESPONSE

For optimum settling time and stability with higher impedance

feedback networks (RF > 50kΩ), it may be necessary to add

a feedback capacitor across the feedback resistor, RF, as

shown in Figure 13. This capacitor compensates for the zero

created by the feedback network impedance and the OPA569

input capacitance (and any parasitic layout capacitance).

The effect becomes more significant with higher impedance

networks.

The size of the capacitor needed is estimated using the

equation:

RIN • CIN = RF • CF

where CIN is the sum of the input capacitance of the OPA569

plus the parasitic layout capacitance.

Temperature (

°C)

MAXIMUM POWER DISSIPATION

vs TEMPERATURE

–55

–30

–5

120

With 250lfm Airlow

With 150lfm Airlow

Without Forced Air

With 500lfm Airlow

J = 150°C

FIGURE 12. Thermal Resistance vs Circuit Board Copper

Area.

012345

Copper Area (inches2)

THERMAL RESISTANCE vs COPPER AREA

OPA569

Surface-Mount Package

OPA569

V+

V–

OUT

12,

14,

17,

IN • CIN = RF • CF

Where C

IN is equal to the OPA569’s input

capacitance (approximately 9pF) plus any

parasitic layout capacitance.

FIGURE 13. Feedback Capacitor for use with Higher Imped-

ance Networks.

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