Unbalanced Data Transmission

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Logic Level Translator

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The DS78LS120 may be used as a level translator to inter-

the input signal, and the other input to the driving gate.

LINE DRIVERS

Line drivers which will interface with the DS78LS120 are

listed below.

Balanced Drivers

DS26LS31: Quad RS-422 Line Driver, Dual CMOS

DS7830, DS8830: Dual TTL

DS7831, DS8831: Dual TRI-STATE TTL

DS7832, DS8832: Dual TRI-STATE TTL

DS1691A, DS3691: Quad RS-423/Dual RS-422 TTL

DS1692, DS3692: Quad RS-423/Dual TRI-STATE RS-422

TTL

DS3487: Quad TRI-STATE RS-422

Unbalanced Drivers

DS1488: Quad RS-232

DS75150: Dual RS-232

RESPONSE CONTROL AND HYSTERESIS

In unbalanced (RS-232/RS-423) applications it is recom-

mended that the rise time and fall time of the line driver be

controlled to reduce cross-talk. Elimination of switching

noise is accomplished in the DS78LS120 by the 50 mV of

hysteresis incorporated in the output gate. This eliminates

the oscillations which may appear in a line receiver due to

the input signal slowly varying about the threshold level for

extended periods of time.

High frequency noise which is superimposed on the input

signal which may exceed 50 mV can be reduced in ampli-

tude by filtering the device input. On the DS78LS120, a high

impedance response control pin in the input amplifier is

available to filter the input signal without affecting the termi-

nation impedance of the transmission line. Noise pulse width

rejection vs the value of the response control capacitor is

shown in Figure 1 and Figure 2. This combination of filters

followed by hysteresis will optimize performance in a worse

case noise environment.

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FIGURE 1. Noise Pulse Width vs

Response Control Capacitor

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