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LM5104M датащи(PDF) 2 Page - National Semiconductor (TI) |
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LM5104M датащи(HTML) 2 Page - National Semiconductor (TI) |
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2 / 12 page ![]() Connection Diagram Ordering Information Ordering Number Package Type NSC Package Drawing Supplied As LM5104M SOIC-8 M08A Shipped with Anti-Static Rails LM5104MX SOIC-8 M08A 2500 shipped as Tape & Reel LM5104SD LLP-10 SDC10A 1000 shipped as Tape & Reel LM5104SDX LLP-10 SDC10A 4500 shipped as Tape & Reel Pin Descriptions Pin Name Description Application Information SOIC-8 LLP-10 11 V DD Positive gate drive supply Locally decouple to V SS using low ESR/ESL capacitor, located as close to IC as possible. 2 2 HB High side gate driver bootstrap rail Connect the positive terminal of bootstrap capacitor to the HB pin and connect negative terminal to HS. The Bootstrap capacitor should be placed as close to IC as possible. 3 3 HO High side gate driver output Connect to gate of high side MOSFET with short low inductance path. 4 4 HS High side MOSFET source connection Connect to bootstrap capacitor negative terminal and source of high side MOSFET. 5 7 RT Deadtime programming pin Resistor from RT to ground programs the deadtime between high and low side transitions.The resistor should be located close to the IC to minimize noise coupling from adjacent traces. 6 8 IN Control input Logic 1 equals High Side ON and Low Side OFF. Logic 0 equals High Side OFF and Low Side ON. 79 V SS Ground return All signals are referenced to this ground. 8 10 LO Low side gate driver output Connect to the gate of the low side MOSFET with a short low inductance path. Note: For LLP-10 package, it is recommended that the exposed pad on the bottom of the LM5100 / LM5101 be soldered to ground plane on the PC board, and the ground plane should extend out from beneath the IC to help dissipate the heat. Pins 5 and 6 have no connection. 20089001 8-Lead SOIC See NS Package Number M08A 20089002 10-Lead LLP See NS Package Number SDC10A FIGURE 2. www.national.com 2 |
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