MCP2050 datasheet(8/40 Pages) MICROCHIP

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MCP2050

DS20002299C-page 8

 2012-2014 Microchip Technology Inc.

1.3

Pin Descriptions

Please refer to Table 1-2 for the pinout overview.

TABLE 1-2:

PINOUT DESCRIPTIONS

1.3.1

VBATRATIO

This is an analog output pin that reflects the voltage at

the

VBAT pin. It is scaled by VREG such that:

VBATRATIO = VBAT/24 × VREG

0 <= VBATRATIO <= VREG

The resistive divider and the output driver are switched

off during Power-Down mode in order to reduce power

consumption.

1.3.2

RXD

Receive Data Output pin. The RXD pin is a standard

CMOS output pin and it follows the state of the LBUS pin.

1.3.3

CS/LWAKE

Chip Select and Local Wake-Up Input pin (TTL level,

high voltage tolerant). This pin controls the device state

transition. Refer to Figure 1-1.

If CS/LWAKE = 1, the device can work in Operation

mode (FAULT/TXE = 1) or Transmitter Off mode

(FAULT/TXE = 0).

If CS/LWAKE = 0, the device can work in Power-Down

mode or Ready mode.

An internal pull-down resistor will keep the CS/LWAKE

pin low to ensure that no disruptive data will be present

on the bus while the microcontroller is executing a

Power-on Reset and I/O initialization sequence. When

CS/LWAKE is ‘1’, a weak pull-down (~600 kΩ) is used

to reduce current. When CS/LWAKE is ‘0’ a stronger

pull-down (~300 kΩ) is used to maintain the logic level.

This pin may also be used as a local wake-up input

(see Figure 1-12). The microcontroller will set the I/O

pin to control the CS/LWAKE. An external switch, or

other source, can then wake-up both the transceiver

and the microcontroller.

PIN Name

Devices

PIN Type

Function

14-Pin

PDIP, SOIC

5 x 5 QFN

Normal Operation

VBATRATIO

Analog Output

VBATRATIO = VBAT/24 × VREG

RXD

Output

Receive Data Output

CS/LWAKE

TTL Input, HV-tolerant Chip Select and Local Wake-up Input

VREG

Output

Voltage Regulator Output

TXD

Input, HV-tolerant

Transmit Data Input

RESET

Output

Reset Output

6,9,10,11,

16,19,20

Not Connected

—

VSS

Power

Ground

LBUS

I/O, HV

LIN Bus

VBB

Power

Battery

FAULT/TXE

I/O, HV-tolerant

Fault Detect Output/Transmitter Enable Input

WWDTSELECT

Input

A Resistor between this pin and Ground

determines the Watchdog Window length

WWDTTRIG

Input

Windowed Watchdog Trigger Input

WWDTRESET

Output, HV-tolerant

Windowed Watchdog Reset Output

—

Exposed Thermal Pad

(EP)

Exposed Thermal Pad can be left unconnected,

or connected to the ground.

Note:

CS/LWAKE should NOT be tied directly to

pin VREG as this could force the

MCP2050 into Operation Mode before the

microcontroller is initialized.

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