MCP19116T-ESLASHMJ datasheet(9/246 Pages) MICROCHIP

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 2015-2016 Microchip Technology Inc.

DS20005479B-page 9

MCP19116/7

1.0

DEVICE OVERVIEW

The MCP19116/7 devices are highly integrated,

mixed-signal low-side synchronous controllers that

operate from +4.5V to +42V. The family features an

analog

PWM

controller

with

integrated

microcontroller core used for LED lighting systems,

battery chargers and other low-side switch PWM

applications. The MCP19116/7 devices are derived

from the MCP19114/5 which share the same features

and characteristics except for the addition of larger

program memory (8k words vs 4k words) and several

design enhancements. These enhancements were

added to the MCP19116/7 devices to improve

calibration, increase accuracy and provide greater

flexibility. The devices feature an analog internal PWM

controller similar to the MCP1631, and a standard PIC®

microcontroller similar to the PIC12F617.

Complete

customization

device

operating

parameters, start-up or shutdown profiles, protection

levels and fault handling procedures are accomplished

by setting digital registers using Microchip’s MPLAB® X

Integrated Development Environment software and

one of Microchip’s many in-circuit debugger and device

programmers.

The MCP19116/7 mixed-signal low-side synchronous

controllers feature integrated programmable input

UVLO/OVLO, programmable output overvoltage (OV),

two low-side gate drive outputs with independent

programmable dead time, programmable leading edge

blanking (four steps), programmable 6-bit slope

compensation

and

integrated

internal

programmable

oscillator

for

fixed-frequency

applications.

An integrated 8-bit reference voltage (VREF) is used for

setting output current or voltage. An internal

comparator supports quasi-resonant applications.

Additional Capture and Compare modules are

integrated for increased control, including enhanced

dimming capability.

The MCP19116/7 devices contain two internal LDOs. A

5V LDO (VDD) is used to power the internal processor

and provide 5V externally. A 4V LDO (AVDD) is used to

power the internal analog circuitry. Either VDD or AVDD

can

connected

internally

the

10-bit

Analog-to-Digital Converter reference input. The 5V

external output can be used to supply the gate drive.

An analog filter between the VDD output and the VDR

input is recommended when implementing a 5V gate

drive supplied from VDD. Two 4.7 µF capacitors are

recommended with one placed as close as possible to

VDD and one as close as possible to VDR, separated by

a 10

 isolation resistor. DO NOT exceed 10 µF on the

VDD. An external supply is required to implement

higher gate drive voltages.

By utilizing a Microchip Technology Incorporated

TC1240A voltage doubler supplied from VDD to provide

VDR, a 10V gate drive can be achieved.

A 4V LDO is used to power the internal analog circuitry.

The two low-side drivers can be used to operate the

power converter in bidirectional mode, enabling the

“shaping” of LED dimming current in LED applications

or developing bidirectional power converters for

battery-powered applications.

The MCP19116 is packaged in a 24-lead 4 mm x 4 mm

QFN. The MCP19117 is packaged in a 28-lead

5 mm x 5 mm QFN.

The ability for system designers to configure

application-specific features allows users of the

MCP19116/7 devices to save costly board real estate

and additional component costs.

The General Purpose Input/Output (GPIO) of the

MCP19116/7 can be configured to offer a status output:

• a device enable, to control an external switch

• a switching frequency synchronization output or

input

• and even a device status or "heartbeat" indicator

With integrated features like output current adjustment

and

dynamic

output

voltage

positioning,

the

MCP19116/7 family has the best in-class performance

and highest integration level currently available.

Power trains supported by this architecture include but

are not limited to boost, flyback, quasi-resonant

flyback, SEPIC, Ćuk, etc.

Two low-side gate drivers are capable of sinking and

sourcing 1A at 10V VDR. With a 5V gate drive, the

driver is capable of 0.5A sink and source. The user has

the option to allow the VIN UVLO to shut down the

drivers by setting the UVLOEN bit. When this bit is not

set, the device drivers will ride through the UVLO

condition and continue to operate until VDR reaches the

gate drive UVLO value. This value is selectable at 2.7V

or 5.4V and is always enabled. An internal reset for the

microcontroller core is set to 2.0V. An internal

comparator module is used to sense the desaturation

of the flyback transformer to synchronize switching for

quasi-resonant applications.

The operating input voltage for normal device operation

ranges from +4.5V to +42V with an absolute maximum

of 44V. The maximum transient voltage is 48V for

500 ms. An I2C serial bus is used for device

communications from the PWM controller to the

system.

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