AD7490

–11–

REV. A

SHADOW REGISTER

The Shadow Register on the AD7490 is a 16-bit, write-only register. Data is loaded from the DIN Pin of the AD7490 on the falling

edge of SCLK. The data is transferred on the DIN line at the same time as a conversion result is read from the part. This requires 16 serial

falling edges for the data transfer. The information is clocked into the Shadow Register provided the SEQ and Shadow Bits were set to

0, 1 respectively in the previous write to the Control Register. MSB denotes the first bit in the data stream. Each bit represents an

analog input from channel 0 through to channel 15. A sequence of channels may be selected through which the AD7490 will cycle with

each consecutive

CS falling edge after the write to the Shadow Register. To select a sequence of channels, the associated channel bit

must be set for each analog input. The AD7490 will continuously cycle through the selected channels in ascending order, beginning

with the lowest channel, until a write operation occurs (i.e., the WRITE Bit is set to 1) with the SEQ and Shadow Bits configured in

any way except 1, 0 (see Table IV). The bit functions are outlined in Table V.

Table V. Shadow Register Bit Functions

B

S

M

B

S

L

I

0

I

1

I

2

I

3

I

4

I

5

1

POWER ON

DUMMY CONVERSIONS

DIN = ALL 1s

DIN: WRITE TO CONTROL REGISTER,

WRITE BIT = 1,

SELECT CODING, RANGE, AND POWER MODE

SELECT CHANNEL A3–A0 FOR CONVERSION,

SEQ = SHADOW = 0

DOUT: CONVERSION RESULT FROM PREVIOUSLY

SELECTED CHANNEL A3–A0

DIN: WRITE TO CONTROL REGISTER,

WRITE BIT = 1,

SELECT CODING, RANGE, AND POWER MODE

SELECT A3–A0 FOR CONVERSION,

SEQ = SHADOW = 0

WRITE BIT = 1,

SEQ = SHADOW = 0

CS

CS

Figure 2. SEQ Bit = 0, SHADOW Bit = 0 Flowchart

Figure 2 reflects the normal operation of a multichannel ADC,

where each serial transfer selects the next channel for conversion.

In this mode of operation, the sequencer function is not used.

Figure 3 shows how to program the AD7490 to continuously con-

vert on a particular sequence of channels. To exit this mode of

operation and revert back to the normal mode of operation of a

multichannel ADC (as outlined in Figure 2), ensure the WRITE

Bit = 1 and the SEQ = SHADOW = 0 on the next serial transfer.

POWER ON

DUMMY CONVERSIONS

DIN = ALL 1s

DIN: WRITE TO CONTROL REGISTER,

WRITE BIT = 1,

SELECT CODING, RANGE, AND POWER MODE

SELECT CHANNEL A3–A0 FOR CONVERSION,

SEQ = 0 SHADOW = 1

DOUT: CONVERSION RESULT FROM PREVIOUSLY

SELECTED CHANNEL A3–A0

DIN: WRITE TO SHADOW REGISTER, SELECTING

WHICH CHANNELS TO CONVERT ON; CHANNELS

SELECTED NEED NOT BE CONSECUTIVE

WRITE BIT = 1,

SEQ = 1,

SHADOW = 0

CONTINUOUSLY

CONVERTS ON THE

SELECTED

SEQUENCE OF

CHANNELS

CONTINUOUSLY

CONVERTS ON THE

SELECTED SEQUENCE

OF CHANNELS BUT

WILL ALLOW RANGE,

CODING, AND SO ON,

TO CHANGE IN THE

CONTROL REGISTER

WITHOUT INTERRUPT-

ING THE SEQUENCE

PROVIDED,

SEQ = 1 SHADOW = 0

WRITE BIT = 0

WRITE BIT = 0

WRITE BIT = 1,

SEQ = 1, SHADOW = 0

WRITE

BIT = 0

CS

CS

CS

Figure 3. SEQ Bit = 0, SHADOW Bit = 1 Flowchart