ST16C450 datasheet(5/28 Pages) EXAR

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ST16C450

Rev. 4.20

-IOR

Read data strobe (active low strobe). A logic 0 on this pin

transfers the contents of the ST16C450 data bus to the

CPU.

-IOW

Write data strobe (active low strobe). A logic 0 on this pin

transfers the contents of the CPU data bus to the addressed

internal register.

INT

Interrupt Request (active high). Interrupts are enabled in the

interrupt enable register (IER), and when an interrupt con-

dition exists. Interrupt conditions include: receiver errors,

available receiver buffer data, transmit buffer empty, or

when a modem status flag is detected.

CSOUT

Chip select out. A high on this pin indicates that the

ST16C450 has been enabled by the chip select pin.

-BAUDOUT

Baud Rate Generator Output. This pin provides the 16X

clock of the selected data rate from the baud rate generator.

The RCLK pin must be connected externally to -BAUDOUT

when the receiver is operating at the same data rate.

-DDIS

Drive Disable. This pin goes to a logic 0 when the external

CPU is reading data from the ST16C450. This signal can be

used to disable external transceivers or other logic func-

tions.

-OP1

Output-1 (User Defined) - See bit-2 of modem control

RESET

Reset. (active high) - A logic 1 on this pin will reset the

internal registers and all the outputs. The UART transmitter

output and the receiver input will be disabled during reset

time. (See ST16C450 External Reset Conditions for initial-

ization details.)

RCLK

Receive Clock Input. This pin is used as external 16X clock

input to the receiver section. External connection to -

Baudout pin is required in order to utilize the internal baud

rate generator.

SYMBOL DESCRIPTION

Symbol

Signal

Pin Description

type

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